arXiv:2507.05134v2 Announce Type: replace Abstract: We present a deep learning approach to extract physical parameters (e.g., mobility, Schottky contact barrier height, defect profiles) of two-dimens...
arXiv:2504. 03711v2 Announce Type: replace-cross Abstract: Artificial intelligence (AI)-driven electronic design automation (EDA) techniques have been extensively explored for VLSI circuit design applications.
arXiv:2606. 24046v1 Announce Type: cross Abstract: This work presents a machine learning framework that leverages an autoencoder (AE) for the efficient modeling of FinFET.
arXiv:2606. 01265v1 Announce Type: cross Abstract: This paper demonstrates the effectiveness of machine learning-driven optimization for designing application-specific GaN tri-gate FinFETs in vertical power delivery systems.
The paper presents physics‑guided machine‑learning models that predict defect formation energies and zero‑phonon lines (ZPLs) for point defects in semiconductors, aiming to replace costly density‑functional theory (DFT) calculations in the prescreening stage of high‑throughput workflows. Using ridge, kernel ridge, and multilayer perceptron models with three descriptors, the authors achieve mean absolute errors of 0.437 eV for formation energies and 0.202 eV for ZPLs on vacancies and substitutions in 4H‑SiC, while interstitials show larger errors (1.101 eV and 0.230 eV). These results demonstrate that the models can effectively accelerate defect screening, potentially obviating the need for expensive DFT relaxations in many cases.
arXiv:2606. 11247v1 Announce Type: cross Abstract: Generative models are increasingly used to propose designs, data, and control actions for physical systems, yet many such systems are governed by hard physical constraints rather than by perceptual plausibility.
arXiv:2609.36752v1 Announce Type: new Abstract: Circuit design is a complex and iterative process that requires expertise in electronic engineering. It involves selecting components while meeting per...
arXiv:2605. 10807v4 Announce Type: replace-cross Abstract: The integration of Large Language Models (LLMs) into Electronic Design Automation (EDA) and hardware security is rapidly reshaping the semiconductor industry.
arXiv:2603. 09161v2 Announce Type: replace-cross Abstract: Learning effective netlist representations is fundamentally constrained by the scarcity of labeled datasets, as real designs are protected by Intellectual Property (IP) and costly to annotate.
arXiv:2607. 05187v1 Announce Type: new Abstract: As CMOS technology scales into the deep nanometer regime, digital circuit reliability is increasingly threatened by the combined stochastic effects of Bias Temperature Instability (BTI) and Process Variation (PV).
The article presents the first demonstration of an agentic TCAD calibration workflow for a fabricated bottom‑gate In–W–O transistor. Starting from measured transfer curves, the workflow uses measurement–TCAD residuals and local sensitivity tests to guide parameter corrections or additional physical models, accepting only updates that improve device metrics. For a 2%‑W reference device, five agent‑suggested updates reduced the multi‑metric device objective by 14.3× and achieved low errors in threshold voltage and on‑current across varying bias and geometry, showing model transferability and process sensitivity.
arXiv:2606. 16032v1 Announce Type: cross Abstract: Interest in applying data-driven approaches in manufacturing has grown significantly, particularly for mapping complex, high-dimensional relationships.