As CMOS technology scales into the deep nanometer regime, digital circuit reliability is increasingly threatened by the combined stochastic effects of Bias Temperature Instability (BTI) and Process Variation (PV). Traditional reliability analysis methods, which rely on computationally intensive simulations or extensive lookup tables, fail to scale efficiently for large designs, creating a critical bottleneck in design space exploration.
arXiv:2308. 07867v4 Announce Type: replace-cross Abstract: The absence of formal performance guarantees in machine learning (ML) has limited its adoption for safety-critical power system applications, where confidence and interpretability are as vital as accuracy.
By Parikshit Pareek, Sidhant Misra, Deepjyoti Deka
arXiv:2608. 09622v1 Announce Type: new Abstract: Reliability qualification of advanced semiconductor devices requires sequential stress decisions that balance characterization objectives against multiple competing failure mechanisms.
By Youssef A. Elhagrasy, Ian Hill, Andr\'e Ivanov
arXiv:2606. 04266v1 Announce Type: cross Abstract: Deep neural networks (DNNs) are used in a variety of real-world applications including, for example, image classification and speech recognition.
By Alireza Sarmadi, Virinchi Roy Surabhi, Prashanth Krishnamurthy, Hussam Amrouch, Ramesh Karri, Farshad Khorrami
arXiv:2504. 03711v2 Announce Type: replace-cross Abstract: Artificial intelligence (AI)-driven electronic design automation (EDA) techniques have been extensively explored for VLSI circuit design applications.
By Wenji Fang, Jing Wang, Yao Lu, Shang Liu, Yuchao Wu, Yuzhe Ma, Zhiyao Xie
arXiv:2606. 01265v1 Announce Type: cross Abstract: This paper demonstrates the effectiveness of machine learning-driven optimization for designing application-specific GaN tri-gate FinFETs in vertical power delivery systems.
By Ayoub Sadeghi, Leonid Popryho, Inna Partin-Vaisband