arXiv:2603. 09161v2 Announce Type: replace-cross Abstract: Learning effective netlist representations is fundamentally constrained by the scarcity of labeled datasets, as real designs are protected by Intellectual Property (IP) and costly to annotate.
By Siyang Cai, Cangyuan Li, Haoyu Gao, Kun Wang, Yinhe Han, Ying Wang
arXiv:2609.36752v1 Announce Type: new
Abstract: Circuit design is a complex and iterative process that requires expertise in electronic engineering. It involves selecting components while meeting per...
By Pasindu Dodampegama, Praveen Wijesinghe, Naveen Basnayake, Keshawa Jayasundara, Tharindu Bandaragoda
Recent advances in Artificial Intelligence (AI) have revolutionized Electronic Design Automation (EDA), particularly through Large Language Models (LLMs) for circuit design tasks. However, their application to analog and mixed-signal domains remains limited by the lack of machine-readable representations of existing circuit design knowledge.
arXiv:2607. 01609v1 Announce Type: new Abstract: Recent advances in Artificial Intelligence (AI) have revolutionized Electronic Design Automation (EDA), particularly through Large Language Models (LLMs) for circuit design tasks.
By Saoud Aldowaish, Yashwanth Karumanchi, Kai-Chen Chiang, Mohammed Ayman Habib, Finn Murphy, Rishen Cao, Morteza Fayazi
arXiv:2608. 13472v1 Announce Type: cross Abstract: Analog circuit design is a time-consuming, iterative process in a nonlinear and high-dimensional design space that relies heavily on expert intuition.
By Mohammed Ayman Habib, Rylan Hart, Morteza Fayazi
ReDIL-GNN is a framework for resynthesis domain‑incremental learning in circuit graph neural networks. It adapts a fixed prediction or representation head as new synthesis styles appear and evaluates retention across all previously seen domains. The method introduces the Resynthesis Adaptability Index (RAI), a pre‑adaptation score that combines adaptation need, source‑equivalence recoverability, structural coverage, and update compatibility to decide whether to adapt, reuse, or defer updates.
By Rupesh Raj Karn, Johann Knechtel, Ozgur Sinanoglu