arXiv:2609.07046v1 Announce Type: new
Abstract: AI has revolutionized various engineering domains, but its impact on semiconductor device design and defect discovery is still limited, due to limited...
By Hiu Yung Wong
arXiv:2606. 24046v1 Announce Type: cross Abstract: This work presents a machine learning framework that leverages an autoencoder (AE) for the efficient modeling of FinFET.
By Amit Sarkar Suman Sau, Swagata Mandal
arXiv:2609.13200v1 Announce Type: cross
Abstract: Compact transistor models are the mathematical backbone of circuit simulation. However, at advanced nodes such as 3nm, transport physics becomes too...
By Pranavanath Balamurali, Prathamesh Dinesh Joshi, Raj Abhijit Dandekar, Rajat Dandekar, Sreedath Panat
arXiv:2606. 01265v1 Announce Type: cross Abstract: This paper demonstrates the effectiveness of machine learning-driven optimization for designing application-specific GaN tri-gate FinFETs in vertical power delivery systems.
By Ayoub Sadeghi, Leonid Popryho, Inna Partin-Vaisband
arXiv:2602. 04940v2 Announce Type: replace Abstract: Deep learning has emerged as a transformative tool for the neural surrogate modeling of partial differential equations (PDEs), known as neural PDE solvers.
By Hang Zhou, Haixu Wu, Haonan Shangguan, Yuezhou Ma, Huikun Weng, Jianmin Wang, Mingsheng Long
arXiv:2606. 00741v1 Announce Type: cross Abstract: Transistor scaling is approaching a quantum-mechanical limit, as thin gate oxides induce electron leakage through quantum tunneling.
By Uiwon Hwang, Jaeho Hwang
The paper introduces a physics‑informed graph attention network that directly operates on the tetrahedral mesh used in TCAD simulations of FinFET devices. By predicting electrostatic potential and quasi‑Fermi levels at every mesh node and training with both data loss and finite‑volume current‑continuity residuals, the surrogate retains the underlying carrier‑transport physics while achieving size generalization. Benchmarks against Sentaurus Device show sub‑volt RMSE for the drift‑diffusion fields and a per‑design throughput that is orders of magnitude faster, enabling rapid Pareto‑front exploration of large multi‑fin arrays that would otherwise be prohibitively slow to simulate.
By Leonid Popryho, Ayoub Sadeghi, Inna Partin-Vaisband
The paper introduces ADAPT, a lightweight machine‑learning force field that replaces graph neural networks with a direct coordinates‑in‑space Transformer encoder to model all pairwise atomic interactions. Applied to silicon point defects, ADAPT reduces force prediction error by about 22% and energy prediction error by roughly 40% compared to a state‑of‑the‑art GNN model, while also cutting computational cost. This approach addresses common GNN issues such as oversmoothing, oversquashing, and poor long‑range interaction representation, which are especially problematic for point defect modeling.
By Evan Dramko, Yihuang Xiong, Yizhi Zhu, Geoffroy Hautier, Thomas Reps, Christopher Jermaine, Anastasios Kyrillidis
arXiv:2502. 07209v4 Announce Type: replace Abstract: Physics-Informed Neural Networks (PINNs) seek to solve partial differential equations (PDEs) with deep learning.
By Shaghayegh Fazliani, Zachary Frangella, Madeleine Udell
arXiv:2603. 09161v2 Announce Type: replace-cross Abstract: Learning effective netlist representations is fundamentally constrained by the scarcity of labeled datasets, as real designs are protected by Intellectual Property (IP) and costly to annotate.
By Siyang Cai, Cangyuan Li, Haoyu Gao, Kun Wang, Yinhe Han, Ying Wang
arXiv:2606. 09419v1 Announce Type: cross Abstract: Artificial intelligence is rapidly advancing materials characterization, yet most applications in electron microscopy rely solely on image contrast, overlooking the chemical and experimental context that shapes image formation.
By Jiadong Dan, Cheng Zhang, Leyi Loh, Ivan Verzhbitskiy, Yuan Chen, Goki Eda, Michel Bosman, N. Duane Loh
arXiv:2504. 03711v2 Announce Type: replace-cross Abstract: Artificial intelligence (AI)-driven electronic design automation (EDA) techniques have been extensively explored for VLSI circuit design applications.
By Wenji Fang, Jing Wang, Yao Lu, Shang Liu, Yuchao Wu, Yuzhe Ma, Zhiyao Xie