TARGet is an open‑source, topology‑aware machine‑learning framework for modeling RF circuits. It uses S‑parameter representations of sub‑circuits and a fusion architecture that combines Graph Neural Networks with sub‑circuit connectivity‑aware networks, enabling learning across multiple topologies. Experiments show TARGet achieves sub‑1% prediction error, reduces training data needs by up to 35.5×, and improves accuracy by 9.7× over state‑of‑the‑art models, with zero‑shot transfer to unseen sub‑circuit topologies.
arXiv:2508. 16403v3 Announce Type: replace Abstract: Accurately predicting the performance of active radio frequency (RF) circuits is essential for modern wireless systems but remains challenging due to highly nonlinear behavior and the high computational cost of traditional simulation tools.
arXiv:2509. 21886v3 Announce Type: replace Abstract: Learning to compute, the ability to model the functional behavior of a circuit graph, is a fundamental challenge for graph representation learning.
ReDIL-GNN is a framework for resynthesis domain‑incremental learning in circuit graph neural networks. It adapts a fixed prediction or representation head as new synthesis styles appear and evaluates retention across all previously seen domains. The method introduces the Resynthesis Adaptability Index (RAI), a pre‑adaptation score that combines adaptation need, source‑equivalence recoverability, structural coverage, and update compatibility to decide whether to adapt, reuse, or defer updates.
arXiv:2504. 03711v2 Announce Type: replace-cross Abstract: Artificial intelligence (AI)-driven electronic design automation (EDA) techniques have been extensively explored for VLSI circuit design applications.
arXiv:2608. 12687v1 Announce Type: new Abstract: Bayesian optimization (BO) is a sample-efficient framework for analog circuit topology search, where evaluating each candidate topology can require costly simulation.
arXiv:2603. 09161v2 Announce Type: replace-cross Abstract: Learning effective netlist representations is fundamentally constrained by the scarcity of labeled datasets, as real designs are protected by Intellectual Property (IP) and costly to annotate.
arXiv:2607. 23225v1 Announce Type: new Abstract: As chip manufacturing processes advance to deep submicron nodes, parasitic interconnect effects increasingly dominate the performance of analog and mixed-signal (AMS) circuits and often lead to costly layout iterations.
arXiv:2602. 01553v3 Announce Type: replace-cross Abstract: Link prediction is a core challenge in graph machine learning, demanding models that capture rich and complex topological dependencies.
arXiv:2502. 18959v4 Announce Type: replace Abstract: The architecture of a neural network and the choice of its activation function are both fundamental to its performance.
arXiv:2607. 09760v1 Announce Type: cross Abstract: Radio frequency fingerprint identification (RFFI) uses transmitter-specific hardware imperfections as a physicallayer identity cue for Internet of Things (IoT) devices, but deep RFFI models often degrade when the acquisition environment changes.
The paper introduces Radio‑Frequency Convolutional Neural Networks (RF‑CNNs), which repurpose the frequency mixer in wireless radios to perform convolutional neural network inference directly on edge devices. By mapping multi‑channel convolutions onto frequency tones, the passive mixer can execute the entire operation in a single pass, enabling deep CNNs with up to 26.4 million parameters and nine layers to run on smartphones, wearables, and drones. Experimental results show near full‑precision performance while reducing energy consumption to 0.72 fJ per multiply‑accumulate—two orders of magnitude lower than adding a digital processor. "whyItMatters":"The approach leverages existing radio hardware to deliver efficient, state‑of‑the‑art AI inference on billions of devices without increasing size, weight, power, or cost."
The paper introduces Multi-Channel Physics-Aware Random Walk Fingerprints (MC-PA-RWF), a lightweight graph-level representation that incorporates physical edge states into random-walk propagation for power grid graphs. By constructing multiple edge-weighted channels from domain-relevant attributes and concatenating channel-specific fingerprints, the method achieves high balanced accuracy on PowerGraph benchmarks, outperforming topology-only RWF and matching or surpassing several graph neural network baselines. Experiments on three benchmark systems show statistically significant improvements, with the node-edge extension reaching up to 99.32% balanced accuracy and boosting failure-class F1 scores by 1.60–5.84 percentage points.