TARGet is an open‑source, topology‑aware machine‑learning framework for modeling RF circuits. It uses S‑parameter representations of sub‑circuits and a fusion architecture that combines Graph Neural Networks with sub‑circuit connectivity‑aware networks, enabling learning across multiple topologies. Experiments show TARGet achieves sub‑1% prediction error, reduces training data needs by up to 35.5×, and improves accuracy by 9.7× over state‑of‑the‑art models, with zero‑shot transfer to unseen sub‑circuit topologies.
By Soroosh Noorzad, Sebastian Bodero, Morteza Fayazi
arXiv:2607. 23225v1 Announce Type: new Abstract: As chip manufacturing processes advance to deep submicron nodes, parasitic interconnect effects increasingly dominate the performance of analog and mixed-signal (AMS) circuits and often lead to costly layout iterations.
By Jiajun Zou, Jiawei Liu, Ao Liu, Junnong Tian, Yibin Zhang, Chengjie Liu, Yuxi Wang, Shan Shen, Wenhua Gu, Jun Yang, Wenjian Yu
arXiv:2609.36752v1 Announce Type: new
Abstract: Circuit design is a complex and iterative process that requires expertise in electronic engineering. It involves selecting components while meeting per...
By Pasindu Dodampegama, Praveen Wijesinghe, Naveen Basnayake, Keshawa Jayasundara, Tharindu Bandaragoda
The paper introduces Multi-Channel Physics-Aware Random Walk Fingerprints (MC-PA-RWF), a lightweight graph-level representation that incorporates physical edge states into random-walk propagation for power grid graphs. By constructing multiple edge-weighted channels from domain-relevant attributes and concatenating channel-specific fingerprints, the method achieves high balanced accuracy on PowerGraph benchmarks, outperforming topology-only RWF and matching or surpassing several graph neural network baselines. Experiments on three benchmark systems show statistically significant improvements, with the node-edge extension reaching up to 99.32% balanced accuracy and boosting failure-class F1 scores by 1.60–5.84 percentage points.
By Adnan Anwar
arXiv:2509. 21886v3 Announce Type: replace Abstract: Learning to compute, the ability to model the functional behavior of a circuit graph, is a fundamental challenge for graph representation learning.
By Ziyang Zheng, Jiaying Zhu, Jingyi Zhou, Qiang Xu
arXiv:2507. 06849v3 Announce Type: replace-cross Abstract: Neural network (NN)-based Digital Predistortion (DPD) improves linearization for wideband radio frequency (RF) power amplifiers (PAs) but often increases the complexity of the digital back-end.
By Yizhuo Wu, Ang Li, Chang Gao