arXiv:2609.13200v1 Announce Type: cross
Abstract: Compact transistor models are the mathematical backbone of circuit simulation. However, at advanced nodes such as 3nm, transport physics becomes too...
By Pranavanath Balamurali, Prathamesh Dinesh Joshi, Raj Abhijit Dandekar, Rajat Dandekar, Sreedath Panat
arXiv:2606. 24046v1 Announce Type: cross Abstract: This work presents a machine learning framework that leverages an autoencoder (AE) for the efficient modeling of FinFET.
By Amit Sarkar Suman Sau, Swagata Mandal
arXiv:2507.05134v2 Announce Type: replace
Abstract: We present a deep learning approach to extract physical parameters (e.g., mobility, Schottky contact barrier height, defect profiles) of two-dimens...
By Robert K. A. Bennett, Jan-Lucas Uslu, Harmon F. Gault, Asir Intisar Khan, Lauren Hoang, Tara Pe\~na, Kathryn Neilson, Young Suh Song, Zhepeng Zhang, Andrew J. Mannix, Eric Pop
The article presents the first demonstration of an agentic TCAD calibration workflow for a fabricated bottom‑gate In–W–O transistor. Starting from measured transfer curves, the workflow uses measurement–TCAD residuals and local sensitivity tests to guide parameter corrections or additional physical models, accepting only updates that improve device metrics. For a 2%‑W reference device, five agent‑suggested updates reduced the multi‑metric device objective by 14.3× and achieved low errors in threshold voltage and on‑current across varying bias and geometry, showing model transferability and process sensitivity.
By Gyujun Jeong, Junmo Lee, Sungwon Cho, Woohyun Hwang, Kwangyou Seo, Suhwan Lim, Wanki Kim, Daewon Ha, Rishi Ranade, Kihang Youn, Ram Cherukuri, Yiyi Wang, Asif Khan, Shimeng Yu
The paper introduces a physics‑informed graph attention network that directly operates on the tetrahedral mesh used in TCAD simulations of FinFET devices. By predicting electrostatic potential and quasi‑Fermi levels at every mesh node and training with both data loss and finite‑volume current‑continuity residuals, the surrogate retains the underlying carrier‑transport physics while achieving size generalization. Benchmarks against Sentaurus Device show sub‑volt RMSE for the drift‑diffusion fields and a per‑design throughput that is orders of magnitude faster, enabling rapid Pareto‑front exploration of large multi‑fin arrays that would otherwise be prohibitively slow to simulate.
By Leonid Popryho, Ayoub Sadeghi, Inna Partin-Vaisband
arXiv:2603. 13042v2 Announce Type: replace Abstract: Digital Compute-in-Memory (DCiM) accelerates neural networks by reducing data movement.
By Yiqi Zhou, Yue Yuan, Yikai Wang, Bohao Liu, Qinxin Mei, Zhuohua Liu, Shan Shen, Wei Xing, Daying Sun, Li Li, Guozhu Liu