arXiv Machine Learning

SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence

arXiv:2607. 01609v1 Announce Type: new Abstract: Recent advances in Artificial Intelligence (AI) have revolutionized Electronic Design Automation (EDA), particularly through Large Language Models (LLMs) for circuit design tasks.

Hugging Face Trending Papers
Jul 2

SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence

Recent advances in Artificial Intelligence (AI) have revolutionized Electronic Design Automation (EDA), particularly through Large Language Models (LLMs) for circuit design tasks. However, their application to analog and mixed-signal domains remains limited by the lack of machine-readable representations of existing circuit design knowledge.

arXiv AI
6d ago

NetlistBench: Evaluating LLM Reliability in SPICE Netlist Recognition and Manipulation

arXiv:2608. 12197v1 Announce Type: cross Abstract: Large Language Models (LLMs) are increasingly used in circuit design workflows, yet their reliability on simulator-facing SPICE netlist recognition and manipulation remains poorly understood and is rarely separated from high-level design reasoning.

By Jiarui Ma, Jianghan Wang, Yuheng Ma, Ziyi Zhuang, Xiaoguang Liu