arXiv AI
Circuit-MLLM: Topological Logic-Guided Latent-Space Visual Reasoning for Circuit Schematic Understanding
Read the original on arXiv AI →The Flow has not summarised this story yet — read it at arXiv AI.
Related stories
arXiv AI
1d ago
VLM-CAD: VLM-Optimized Collaborative Agent Design Workflow for Analog Circuit Sizing
The paper introduces VLM-CAD, a workflow that uses Vision Language Models (VLMs) for analog circuit sizing while mitigating spatial blindness and logical hallucinations. It incorporates a neuro‑symbolic parsing module, Image2Net, to convert schematics into topological graphs and JSON, and an Explainable Trust Region Bayesian Optimization method, ExTuRBO, to guide design decisions with sensitivity evidence. Experiments on 12 sizing tasks across six circuits and four technology platforms show a Strict Pass@1 of 23.3% and a Relaxed Pass@1 of 91.7%.
arXiv AI
Aug 11
CircuitReason-1k: Benchmarking Long-Horizon Visual-to-Symbolic Reasoning inElectrical Circuits
arXiv:2608. 09374v1 Announce Type: new Abstract: Electrical circuit analysis requires more than recognizing components in an image.
arXiv AI
Aug 26
ReactBench: A Benchmark for Topological Reasoning in MLLMs on Chemical Reaction Diagrams
ReactBench is a benchmark designed to evaluate the structural reasoning abilities of multimodal large language models (MLLMs) using chemical reaction diagrams. The dataset contains 1,618 expert‑annotated question‑answer pairs that test reasoning across four hierarchical task dimensions, from simple endpoint counting to complex topological analysis. Evaluation of 24 MLLMs shows a performance gap of more than 30% between anchor‑based tasks and holistic structural reasoning tasks, indicating that current models struggle with reasoning over branching, converging, and cyclic structures.
Hugging Face Trending Papers
Jul 2
SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence
Recent advances in Artificial Intelligence (AI) have revolutionized Electronic Design Automation (EDA), particularly through Large Language Models (LLMs) for circuit design tasks. However, their application to analog and mixed-signal domains remains limited by the lack of machine-readable representations of existing circuit design knowledge.
arXiv Machine Learning
Jul 3
SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence
arXiv:2607. 01609v1 Announce Type: new Abstract: Recent advances in Artificial Intelligence (AI) have revolutionized Electronic Design Automation (EDA), particularly through Large Language Models (LLMs) for circuit design tasks.
arXiv AI
4d ago
Enhancing Large Language Model-Based Systems for End-to-End Circuit Analysis Problem Solving
The paper introduces an enhanced end‑to‑end circuit analysis framework built on Gemini 2.5 Pro, targeting engineering education. It addresses two key failure modes—circuit‑recognition hallucinations and reasoning‑process hallucinations—by adding a YOLO detector for source polarity re‑identification and an ngspice verification loop for iterative refinement. The resulting pipeline achieves 97.59 % accuracy on 83 undergraduate problems, markedly outperforming the baseline Gemini model and demonstrating significant gains across varied diagram styles and textbooks.