Hugging Face Trending Papers July 2, 2026

SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence

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Recent advances in Artificial Intelligence (AI) have revolutionized Electronic Design Automation (EDA), particularly through Large Language Models (LLMs) for circuit design tasks. However, their application to analog and mixed-signal domains remains limited by the lack of machine-readable representations of existing circuit design knowledge.

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arXiv Machine Learning

Jul 3

SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence

arXiv:2607. 01609v1 Announce Type: new Abstract: Recent advances in Artificial Intelligence (AI) have revolutionized Electronic Design Automation (EDA), particularly through Large Language Models (LLMs) for circuit design tasks.

By Saoud Aldowaish, Yashwanth Karumanchi, Kai-Chen Chiang, Mohammed Ayman Habib, Finn Murphy, Rishen Cao, Morteza Fayazi

llms computer-vision multimodal benchmarks

arXiv Machine Learning

Jul 3

A Survey of Circuit Foundation Model: Foundation AI Models for VLSI Circuit Design and EDA

arXiv:2504. 03711v2 Announce Type: replace-cross Abstract: Artificial intelligence (AI)-driven electronic design automation (EDA) techniques have been extensively explored for VLSI circuit design applications.

By Wenji Fang, Jing Wang, Yao Lu, Shang Liu, Yuchao Wu, Yuzhe Ma, Zhiyao Xie

llms fine-tuning

arXiv Machine Learning

Jul 7

Weave: Verified Netlist-to-Schematic Conversion via Layered Graph Layout

arXiv:2607. 03835v1 Announce Type: cross Abstract: Converting a SPICE netlist into a human-readable schematic is a longstanding problem in electronic design automation: simulators and machine-learning pipelines readily produce netlists, but designers reason about circuits through diagrams.

By Senol Gulgonul

llms benchmarks

arXiv AI

Aug 3

Wrong Code, Right Structure: Learning Netlist Representations from Imperfect LLM-Generated RTL

arXiv:2603. 09161v2 Announce Type: replace-cross Abstract: Learning effective netlist representations is fundamentally constrained by the scarcity of labeled datasets, as real designs are protected by Intellectual Property (IP) and costly to annotate.

By Siyang Cai, Cangyuan Li, Haoyu Gao, Kun Wang, Yinhe Han, Ying Wang

llms benchmarks

arXiv AI

Jul 14

AutoVSR: Automatic Visual-to-Symbolic Reasoning for Symbolic Expression Generation from Circuit Schematic

arXiv:2607. 11338v1 Announce Type: new Abstract: Symbolic expressions can effectively characterize and predict circuit behavior, but deriving them directly from circuit schematics is challenging.

By Zhe Xiao, Longfei Li, Xu He, Haoying Wu, Zixing Zhang, Mingyu Liu

llms agents multimodal benchmarks

arXiv AI

5d ago

AaLLM: An End-to-End Analog Circuit Design Framework from Topology Generation to Sizing Using Large Language Models

arXiv:2608. 13472v1 Announce Type: cross Abstract: Analog circuit design is a time-consuming, iterative process in a nonlinear and high-dimensional design space that relies heavily on expert intuition.

By Mohammed Ayman Habib, Rylan Hart, Morteza Fayazi

llms rag agents benchmarks safety

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SINA: A Fully Automated Circuit Schematic Image to Netlist Generator Using Artificial Intelligence

A Survey of Circuit Foundation Model: Foundation AI Models for VLSI Circuit Design and EDA

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