arXiv Machine Learning October 15, 2026 By Shigeyasu Uno

CktHGVAE: A Symmetric Design/State Heterogeneous Graph Variational Autoencoder for Transistor-level Analog/Mixed-signal Circuit Design and Analysis

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diffusion

arXiv Machine Learning

Jul 16

RF-Informed Graph Neural Networks for Accurate and Data-Efficient Circuit Performance Prediction

arXiv:2508. 16403v3 Announce Type: replace Abstract: Accurately predicting the performance of active radio frequency (RF) circuits is essential for modern wireless systems but remains challenging due to highly nonlinear behavior and the high computational cost of traditional simulation tools.

By Anahita Asadi, Leonid Popryho, Inna Partin-Vaisband

multimodal benchmarks

arXiv Machine Learning

Aug 14

Finding the Needle in a Haystack: Test-Time Analog Circuit Representation Adaptation for Bayesian Optimization

arXiv:2608. 12687v1 Announce Type: new Abstract: Bayesian optimization (BO) is a sample-efficient framework for analog circuit topology search, where evaluating each candidate topology can require costly simulation.

By Fin Amin, Sounak Dutta, Paul D. Franzon

rag

arXiv AI

Aug 6

ORACLE: A Multi-Objective Reinforcement Learning-Based Analog Circuit Design Optimizer with Large Language Models-Guided Exploration

arXiv:2608. 04999v1 Announce Type: cross Abstract: Analog circuit design automation using reinforcement learning (RL) has emerged as a promising approach for reducing manual effort.

By Osei Brempong, Mohammed Ayman Habib, Vivan Poddar, Morteza Fayazi

llms reinforcement-learning benchmarks

arXiv Machine Learning

Jul 28

ParasGB: A Graph Benchmark Suite for Parasitic Estimation on AMS Circuits

arXiv:2607. 23225v1 Announce Type: new Abstract: As chip manufacturing processes advance to deep submicron nodes, parasitic interconnect effects increasingly dominate the performance of analog and mixed-signal (AMS) circuits and often lead to costly layout iterations.

By Jiajun Zou, Jiawei Liu, Ao Liu, Junnong Tian, Yibin Zhang, Chengjie Liu, Yuxi Wang, Shan Shen, Wenhua Gu, Jun Yang, Wenjian Yu

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arXiv Machine Learning

Jul 3

A Survey of Circuit Foundation Model: Foundation AI Models for VLSI Circuit Design and EDA

arXiv:2504. 03711v2 Announce Type: replace-cross Abstract: Artificial intelligence (AI)-driven electronic design automation (EDA) techniques have been extensively explored for VLSI circuit design applications.

By Wenji Fang, Jing Wang, Yao Lu, Shang Liu, Yuchao Wu, Yuzhe Ma, Zhiyao Xie

llms fine-tuning

arXiv Machine Learning

Jul 16

EXPLORE: Exploration with Guided Search for Analog Topology Generation using Language Models

arXiv:2607. 13416v1 Announce Type: new Abstract: Automating analog circuit topology design is essential to reduce the extensive manual effort required to meet increasingly diverse and customized application demands.

By Guanglei Zhou, Chen-Chia Chang, Yikang Shen, Jonathan Ku, Isaac Jacobson, Jingyu Pan, Yiran Chen, Xin Zhang

llms fine-tuning benchmarks

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Related stories

RF-Informed Graph Neural Networks for Accurate and Data-Efficient Circuit Performance Prediction

Finding the Needle in a Haystack: Test-Time Analog Circuit Representation Adaptation for Bayesian Optimization

ORACLE: A Multi-Objective Reinforcement Learning-Based Analog Circuit Design Optimizer with Large Language Models-Guided Exploration

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EXPLORE: Exploration with Guided Search for Analog Topology Generation using Language Models