arXiv:2606. 01188v1 Announce Type: cross Abstract: Translating natural-language hardware requirements into correct printed circuit board (PCB) schematics remains difficult in embedded, IoT, and wearable development.
By Tobias King, Steven Kehrberg, Michael Beigl, Tobias R\"oddiger
The article reviews the growing use of Large Language Models (LLMs) for generating Verilog code, a key hardware description language in electronic design automation. It surveys 102 papers, covering conferences, journals, and preprints, and addresses four research questions about LLM selection, datasets, techniques, and alignment strategies. The review identifies current limitations and proposes a roadmap for future research in LLM-assisted hardware design.
By Guang Yang, Wei Zheng, Xiang Chen, Dong Liang, Peng Hu, Yukui Yang, Shaohang Peng, Zhenghan Li, Jiahui Feng, Xiao Wei, Kexin Sun, Deyuan Ma, Haotian Cheng, Yiheng Shen, Xing Hu, Terry Yue Zhuo, David Lo
PCBnet is a new large‑scale dataset of printed circuit board (PCB) schematics that includes over 300 real‑world designs, more than 50,000 component instances, 150,000 wires, 100,000 text regions, and 400,000 characters, each paired with a SPICE netlist. The authors also introduce an automated pipeline that converts schematic images into netlists, achieving 94.54% component detection mAP, 98.57% text recognition accuracy, and 84.47% end‑to‑end connectivity accuracy. This resource aims to serve as a benchmark and data foundation for future AI‑driven PCB design automation.
By Zhen Huang, Yuhao Gao, Yuzhi Liu, Daian Cheng, Chengyuan Shao, Yucheng Chen, Yongjian Jia, Futing Zhang, Yichen Shi, Wenhao Wang, Zuyan He, Yangbo Wei, Zhanfei Chen, Jinlong Yan, Yu Zhang, Haoying Wu, Ting-Jung Lin, Lei He
arXiv:2607. 09616v1 Announce Type: cross Abstract: As chip complexity increases and time-to-market pressures grow, front-end design has become a critical bottleneck in chip development.
By Kangwei Xu, Bing Li, Ulf Schlichtmann
arXiv:2607. 01609v1 Announce Type: new Abstract: Recent advances in Artificial Intelligence (AI) have revolutionized Electronic Design Automation (EDA), particularly through Large Language Models (LLMs) for circuit design tasks.
By Saoud Aldowaish, Yashwanth Karumanchi, Kai-Chen Chiang, Mohammed Ayman Habib, Finn Murphy, Rishen Cao, Morteza Fayazi
arXiv:2608. 01791v2 Announce Type: replace-cross Abstract: The rapid development of photonic integrated circuits (PICs) is shifting the design flow from traditional graphical user interface (GUI)-based methods to script-based methods for higher flexibility, portability, and maintainability.
By Xiaohan Jiang, Zeyu Li, Wei Zhang, Jiang Xu
arXiv:2607. 16388v1 Announce Type: cross Abstract: Large-scale AI datacenter platforms comprise thousands of heterogeneous hardware components whose validation requires comprehensive fault injection test plans.
By Mohammed-Khalil Ghali, Saurabh Kulkarni, Prathamesh Kulkarni, Rohan Kulkarni, Sangwon Yoon, Daehan Won
Recent advances in Artificial Intelligence (AI) have revolutionized Electronic Design Automation (EDA), particularly through Large Language Models (LLMs) for circuit design tasks. However, their application to analog and mixed-signal domains remains limited by the lack of machine-readable representations of existing circuit design knowledge.
arXiv:2607. 19767v1 Announce Type: new Abstract: A rich and recognizable component library is the cornerstone of printed circuit board (PCB) design and generation.
By Yichen Shi, Yuzhi Liu, Zhuofu Tao, Li Huang, Yuhao Gao, Ting-Jung Lin, Lei Hel
PICasso is an AI‑enabled framework that converts natural‑language specifications into manufacturable silicon photonic integrated circuits (PICs) through a structured pipeline of NL → YAML → GDS, PDK‑aware knowledge injection, automated placement and routing, DRC/LVS validation, and SAX‑based photonic simulation. The authors introduce PIC‑Set, a benchmark of 36 parameterized PIC design tasks, and evaluate several large language models (LLMs) using new metrics such as structural and functional Spec@k, optimization efficiency, and robustness. Across the benchmark, PICasso markedly improves specification satisfaction, achieving up to 92.7% structural Spec@3 and 52% functional Spec@3, while reducing mean insertion loss from 4.98 dB to 3.25 dB through simulation‑guided optimization.
By Deepak Vungarala, Deniz Najafi, Abdulrahman Aljoudi, Zahra Ghanaatian, Navid Khoshavi, Gourav Datta, Arman Roohi, Mahdi Nikdast, Shaahin Angizi
arXiv:2606. 28279v1 Announce Type: cross Abstract: We present HORIZON, a self-evolving agent framework that treats hardware design as repository-level code evolution.
By Cunxi Yu, Chenhui Deng, Nathaniel Pinckney, Brucek Khailany
arXiv:2608. 11220v1 Announce Type: new Abstract: Nowadays, the creation of a process flow diagram (PFD) and its subsequent transformation into a piping and instrumentation diagram (P&ID) is predominantly performed manually.
By Timur Zakarin, Sergei Voitov, Sergei Shumilin, Evgeny Burnaev