FaultGene is an LLM-assisted framework that automatically generates executable fault‑augmented tests for hardware‑in‑the‑loop validation of autonomous driving systems. It takes a baseline Scenic/CARLA scenario and a structured fault specification, then produces fault‑augmented test cases that reflect HIL‑level fault injection effects. The system refines candidates offline using semantic‑consistency checks and execution‑level feedback, enabling high‑quality test generation at deployment time without manual engineering or repeated refinement loops.
Reliable validation of autonomous driving cyber-physical systems requires testing not only nominal driving behavior but also failures arising from faults in sensing and embedded computation. Physical...
arXiv:2606. 19725v1 Announce Type: cross Abstract: Validating changes in low-level C firmware is expensive because unit tests (UTs) are fragile under strict build constraints, where missing headers, unresolved symbols, and dependency mismatches frequently prevent compilation and linking.
arXiv:2607. 16388v1 Announce Type: cross Abstract: Large-scale AI datacenter platforms comprise thousands of heterogeneous hardware components whose validation requires comprehensive fault injection test plans.
arXiv:2503. 08936v3 Announce Type: replace-cross Abstract: Scenario-based testing with driving simulators is extensively used to identify failing conditions of automated driving assistance systems (ADAS).
The paper introduces NeuroAssertion, a coverage-driven framework for generating RTL assertions that integrates formal trace generation, syntax-guided synthesis, and a two-step large language model (LLM) refinement process. It transforms hard-to-reach control-flow conditions into formal reachability goals, uses model checking to produce diverse traces, and mines initial assertions via SyGuS. The refinement stage employs one LLM to propose candidate assertions for uncovered regions and a second LLM to generate repair grammars that guide symbolic synthesis, resulting in roughly twice as many assertions and higher mutation coverage compared to traditional methods.
arXiv:2604. 02478v2 Announce Type: replace Abstract: Deep learning models excel at detecting anomaly patterns in normal data.
arXiv:2608. 13450v1 Announce Type: cross Abstract: Autonomous vehicles depend on large safety-critical software stacks, where weaknesses reachable from adversarial inputs may affect steering, braking, or other control decisions.
arXiv:2606. 31131v1 Announce Type: new Abstract: To ensure safe on-road behavior, pre-deployment testing and failure discovery of Autonomous Driving Systems (ADS) is crucial.
The paper surveys how large language models (LLMs) are being used in hardware verification, covering tasks such as assertion generation, testbench creation, bug localization, and formal reasoning. It categorizes the literature by methodology, verification goal, tool interaction, benchmarks, and evaluation metrics, and distinguishes between inference-time techniques (prompting, retrieval, structured reasoning, agentic workflows) and training-time adaptation. The authors highlight that LLMs excel as semantic reasoning, search, and orchestration components within verification workflows, yet emphasize the need for semantic alignment, scalable integration, generalization, and rigorous evaluation to ensure true verification correctness.
The paper introduces SPAR, a closed‑loop simulation platform that couples real‑time AUV control software with a higher‑level orchestration layer for fault injection, prompting, and evaluation of large language models (LLMs) in diagnosing and recovering from anomalies. SPAR enables ensemble testing of LLMs, comparing a frontier model with three locally deployable LLMs on a mass‑shift fault scenario across 480 trials, revealing that model choice significantly affects diagnostic accuracy. The study demonstrates that while the frontier model consistently ranks the correct fault mechanism among its top hypotheses, local models succeed mainly when they follow the full diagnostic procedure, and overall diagnosis and operational decisions appear decoupled in this dataset.
SysML v2's textual syntax enables compiler-based validation of model structure and language conformance. However, semantic mistakes that preserve syntactic validity but violate domain rules cannot be detected through compilers.
The paper introduces a dictionary-guided HDL repair system that uses ANTLR-derived mutation vocabularies and a simulation-divergence fault localization module to generate syntactically valid Verilog mutations. The mutation operator performs token substitutions, insertions, and deletions via regex matching, while the fault localization scores source lines based on proximity to diverging output wires, guiding the search. Evaluated on the CirFix benchmark, the approach achieves correct repairs on 14 bug variants, including a multi-bug case, and outperforms CirFix with an 18x speedup on a two-edit benchmark.