arXiv AI
Aug 17
PPAPlace: Differentiable Cross-Stage Objectives for Chip Placement Optimization
arXiv:2608. 13790v1 Announce Type: cross Abstract: Macro placement significantly affects a chip's post-route performance, power, and area (PPA).
EGGPlacer: Energy-Guided Generative Chip Placement with Diffusion Models
EGGPlacer is an energy‑guided diffusion framework for macro placement that integrates analytical placement feedback and differentiable thermal feedback. By treating these signals as composable energies, the method injects them into reverse diffusion without retraining the generative model. Experiments on public benchmarks show that EGGPlacer achieves competitive mixed‑size HPWL and outperforms other methods in routed wirelength and peak temperature.
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arXiv Machine Learning
Oct 5
A Composable AI-Accelerated Iterative Solver for 3D-IC Thermal Modeling
A new AI-accelerated iterative solver, DAIST, is introduced for 3D-IC thermal modeling. It decomposes a full-package FEM simulation into block-level subdomains, replaces each subdomain solver with a neural operator, and couples them through iterative exchanges of interfacial temperature and heat flux. This approach eliminates the need to retrain models when die count or topology changes and offers a controllable accuracy‑runtime tradeoff, achieving up to 178× speedup with minimal temperature error on tested systems.
arXiv Machine Learning
Jul 9
HPG-Diff: Hierarchical physics-guided diffusion with differentiable connectivity constraints for topology optimization
arXiv:2607. 07233v1 Announce Type: new Abstract: Deep generative models offer a promising paradigm for topology optimization, enabling rapid design exploration.
arXiv AI
Jul 21
CoEvoP&R: Co-Evolving Placement Objectives with Routing Feedback via Large Language Models
arXiv:2607. 17398v1 Announce Type: cross Abstract: Analytical placers rely on differentiable objective functions to guide placement, typically combining intermediate surrogate metrics such as half-perimeter wirelength (HPWL) and cell-density penalties.
arXiv AI
Sep 21
PlaceReasoner-Beta: Reasoning-Driven Macro Placement and Benchmarking
arXiv:2609.21263v1 Announce Type: new Abstract: Automated macro placement remains a fundamental challenge in VLSI physical design. Despite decades of research, existing approaches predominantly optim...
arXiv AI
Jun 2
FlowPlace: Flow Matching for Chip Placement
arXiv:2604. 23658v2 Announce Type: replace-cross Abstract: Chip placement plays an important role in physical design.
arXiv AI
Jun 2
Physics-Guided Geometric Diffusion for Macro Placement Generation
arXiv:2605. 16451v2 Announce Type: replace-cross Abstract: Macro placement is a pivotal stage in VLSI physical design, fundamentally determining the overall chip performance.
arXiv Machine Learning
Aug 18
DeepOHeat-v2: Self-Improving Operator Learning for Fast and Trustworthy Thermal Optimization in 3D-IC Design
arXiv:2608. 16080v1 Announce Type: new Abstract: Thermal-aware optimization of multi-die 3D integrated circuits evaluates many designs, each a costly heat-equation solve.
arXiv AI
Jul 21
BBOPlace-Bench: Benchmarking Black-Box Optimization for Chip Placement
arXiv:2510. 23472v2 Announce Type: replace-cross Abstract: Chip placement is a vital stage in modern chip design, and black-box optimization (BBO) has been applied to it for decades.
arXiv Machine Learning
Jun 24
EnerInfer: Energy-Aware On-Device LLM Inference
arXiv:2606. 23001v1 Announce Type: cross Abstract: On-device LLM inference is increasingly attractive for privacy-preserving, reliable, and cost-effective deployment, yet its energy and thermal costs remain a critical bottleneck.
Hugging Face Trending Papers
Jun 8
Order Matters: Unveiling the Hidden Impact of Macro Placement Sequences via Proxy-Guided LLM Evolution
Macro placement is a fundamental step in modern chip physical design, playing a crucial role in determining the solution quality of high-dimensional combinatorial optimization problems. Despite recent advancements in machine learning for spatial coordinate determination, the temporal dimension of placement sequencing remains largely governed by static heuristics.
arXiv AI
Jun 9
Order Matters: Unveiling the Hidden Impact of Macro Placement Sequences via Proxy-Guided LLM Evolution
arXiv:2606. 08904v1 Announce Type: new Abstract: Macro placement is a fundamental step in modern chip physical design, playing a crucial role in determining the solution quality of high-dimensional combinatorial optimization problems.