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FALCON is a camera‑based 3D occupancy front‑end built on the AMD Kria KR260 FPGA that provides explicit latency guarantees for autonomous driving perception. The system uses cycle‑bounded programmable‑logic compute, a measured inference envelope over 100k frames, and a watchdog to flag stale outputs, achieving all 300k proxy frames within a 100 ms deadline plus at most 10.2 ms. On the full FlashOcc pipeline the board attains 29.88 mIoU on the Occ3D‑nuScenes set, matching 92.8 % of an FP32 baseline, while maintaining tighter tail latency than competing Jetson Orin and datacenter GPUs.
The paper presents a two‑stage speed‑limit sign recognizer for automotive SoCs that compresses a YOLO‑family detector via channel replay pruning and implements a lightweight five‑layer CNN reader using 4‑bit weights and 8‑bit activations. Replay pruning removes over 60% of parameters while matching parent accuracy, outperforming other pruning methods on YOLOv5n and YOLOv8n. The resulting system, with 0.72 M parameters, achieves 95.2% recognition accuracy at 94 fps on a Jetson AGX Orin, fitting within tight memory, arithmetic, and energy budgets.
We present SweepLSD, a line segment detector that reads the image exactly once and emits each segment within a few rows of its last pixel passing the scan line. Every stage, including connected-compon...
arXiv:2608.22086v1 Announce Type: cross Abstract: We present SweepLSD, a line segment detector that reads the image exactly once and emits each segment within a few rows of its last pixel passing the...
arXiv:2609.08914v2 Announce Type: replace Abstract: Pixel-level annotation of fixed traffic-camera imagery is expensive, while crosswalk models trained from street-level imagery face a substantial vi...
arXiv:2609.14247v1 Announce Type: cross Abstract: Bird-strike mitigation at wind farms requires identifying distant birds that span only tens of pixels, so the classifier's input resolution N is a de...