arXiv Machine Learning September 7, 2026 By Opegbemi Matthias Busoye, Tolulope Matthew Busoye, Eghonghon-aye Eigbe

Deep Microcompression: Structured Pruning and Bit-packed Quantization for Microcontrollers

Read the original on arXiv Machine Learning →

Deep Microcompression (DMC) is a hardware‑aware pipeline that combines structured pruning, quantization‑aware training, and fixed‑length bit‑packing to enable deep learning inference on bare‑metal microcontrollers. The method achieves a 55.8× weight compression on LeNet‑5 while maintaining 98.77% accuracy, and produces a dependency‑free C library with deterministic latency. On the RP2040 Cortex‑M0+ microcontroller, DMC cuts binary size threefold compared to TensorFlow Lite while matching its accuracy, and it is the first documented deployment of a standard CNN on the 2 KB SRAM ATmega328P.

Machine-generated by The Flow from the publisher's headline and feed description — not written or checked by a human. The full article lives at arXiv Machine Learning.

efficiency

arXiv Machine Learning

Aug 28

Pruning Binarized Neural Networks: A Dedicated Framework and Globally Weighted Algorithms

The paper presents a PyTorch-based framework for designing and optimizing binarized neural networks, incorporating freezing and pruning mechanisms. It introduces a novel pruning method that uses a global weighting scheme to assess parameter importance across abstraction levels, achieving a 70% pruning rate on VGG11 without sacrificing accuracy—outperforming existing binarized pruning results of 41%. The framework facilitates rapid, reproducible evaluation and prototyping of state‑of‑the‑art binarized network techniques.

By Roan Rubiales, Jean Pierre David

efficiency benchmarks

Hugging Face Trending Papers

Jun 22

Hybrid Compression: Integrating Pruning and Quantization for Optimized Neural Networks

Deep neural networks have witnessed remarkable advancements in recent years and have become integral to various applications. However, alongside these developments, training and deployment of neural network models on embedding and edge devices face significant challenges due to limited memory and computational resources.

rag efficiency benchmarks

arXiv AI

Jun 4

LLM Compression with Jointly Optimizing Architectural and Quantization choices

arXiv:2606. 04063v1 Announce Type: cross Abstract: Deploying large language models (LLMs) is challenging due to their significant memory and computational requirements.

By Hoang-Loc La, Truong-Thanh Le, Amir Taherkordi, Phuong Hoai Ha

llms efficiency

arXiv AI

Jul 9

MiLSD: A Micro Line-Segment Detector for Resource-Constrained Devices

arXiv:2607. 06600v1 Announce Type: cross Abstract: Line segment detection is a key building block in visual SLAM, 3D reconstruction, and industrial inspection.

By Parsa Hassani Shariat Panahi, Amir Hossein Jalilvand, M. Hassan Najafi

efficiency

arXiv Machine Learning

Jul 31

WIDE: Boosting Adaptive LLM Inference via Token-level Dynamic Width Pruning

arXiv:2607. 28418v1 Announce Type: cross Abstract: Pruning is a promising approach for improving the efficiency of LLMs.

By Haozhe Hu, Hao Wu, Peiran Yin, Chao Han, Yunpu Ma, Xiaoyu Shen

llms nlp efficiency benchmarks

arXiv AI

Jun 19

PrototypeNAS: Rapid Design of Deep Neural Networks for Microcontroller Units

arXiv:2603. 15106v2 Announce Type: replace Abstract: Enabling efficient deep neural network (DNN) inference on edge devices with different hardware constraints is a challenging task that typically requires DNN architectures to be specialized for each device separately.

By Mark Deutel, Simon Geis, Axel Plinge

computer-vision efficiency

One email a morning, machine-written

Related stories

Pruning Binarized Neural Networks: A Dedicated Framework and Globally Weighted Algorithms

Hybrid Compression: Integrating Pruning and Quantization for Optimized Neural Networks

LLM Compression with Jointly Optimizing Architectural and Quantization choices

MiLSD: A Micro Line-Segment Detector for Resource-Constrained Devices

WIDE: Boosting Adaptive LLM Inference via Token-level Dynamic Width Pruning

PrototypeNAS: Rapid Design of Deep Neural Networks for Microcontroller Units