The paper investigates how temperature affects analog deep neural network (DNN) inference, focusing on both stochastic and systematic non‑idealities in analog hardware. Experiments show that temperature‑induced performance loss is mainly driven by systematic errors rather than random noise. The study evaluates various mitigation techniques, finding that noise‑aware training and temperature‑aware calibration—especially hardware‑in‑the‑loop training—best preserve inference accuracy across different thermal conditions.
arXiv:2607. 16183v1 Announce Type: new Abstract: To address the escalating energy and latency demands of machine-learning workloads, we introduce a blueprint for an energy-efficient and fast thermodynamic computing stack that leverages stochastic analog processes in physical hardware.
arXiv:2607. 17091v1 Announce Type: cross Abstract: Processing-In-Memory (PIM) has emerged as a promising technology for accelerating machine learning (ML) workloads.
The paper presents an empirically calibrated, state‑aware Dynamic Voltage and Frequency Scaling (DVFS) scheduler that eliminates thermal throttling on a passively cooled Raspberry Pi 5 during sustained YOLOv8n inference. By using time‑domain guards, absolute temperature bounds, and derivative triggers, the scheduler outperforms a temperature‑only baseline with a 6.8% higher frame rate and 1.9% less energy per frame, and it surpasses an actively cooled reference in energy efficiency. The study also identifies that the passive operating envelope closes at ambient temperatures above 27 °C, where nonlinear leakage undermines DVFS control, and demonstrates that correct scheduling can make mechanical cooling unnecessary within the mapped envelope.
RACE-AIMC is a framework that selects a single analog in‑memory computing (AIMC) accelerator from a pool to meet a specified energy budget while providing a mathematically exact upper bound on its error rate. Offline, it evaluates each chip, chooses the best one, and computes the bound; online, only that chip runs and a lightweight check decides whether to accept its output or defer to a fallback. Simulations show the certified error stays below 10% (mean 7.83%) and the system achieves clean‑digital accuracy while reducing energy use by about 69% compared to running all chips.
The paper introduces SMART, a lightweight recalibration technique that adjusts logits based on the margin between the top two logits, called the logit gap. It uses a soft-binned Expected Calibration Error objective to balance bias and variance, enabling stable updates even with limited calibration data. Experiments across various datasets and architectures show SMART achieves state‑of‑the‑art calibration with fewer parameters than existing methods.
arXiv:2606. 04582v1 Announce Type: cross Abstract: Real-time monitoring of the temperature distribution within components and sub-structures is a challenging topic in many systems due to restrictions on feasible sensor locations.
arXiv:2608. 02700v1 Announce Type: cross Abstract: Analog compute-in-memory (CIM) enables energy-efficient neural network inference, but device variation and read noise can severely degrade low-bit quantized models.
arXiv:2606. 27294v1 Announce Type: cross Abstract: Analog hardware platforms such as coupled oscillators and Analog Ising Machines naturally solve differential equations at a fraction of the energy cost of digital computation, making them attractive for low-power generative modeling, yet a fundamental mismatch exists: modern generative models assume flexible, software-defined dynamics, whereas analog hardware imposes fixed, physics-determined differential equations with limited approximation capacity.
arXiv:2605. 10474v2 Announce Type: replace Abstract: Analog neural networks are gaining attention due to their efficiency in terms of power consumption and processing speed.
arXiv:2606. 17249v1 Announce Type: cross Abstract: The dominant trajectory of modern machine learning has been to scale up: larger models, larger accelerators, larger memory budgets.
arXiv:2607. 07745v1 Announce Type: new Abstract: While accuracy, robustness, and calibration are all essential for reliable neural networks, they are often studied separately; developing models that satisfy all three simultaneously remains a central challenge.
arXiv:2505. 20137v5 Announce Type: replace-cross Abstract: Predictive Coding (PC) offers a brain-inspired alternative to backpropagation for neural network training, described as a physical system minimizing its internal energy.