arXiv:2608. 11868v1 Announce Type: new Abstract: The customization, optimization and stabilization of the process flow of a silicon bipolar phototransistor commits months of cleanroom time before a finished device can be measured, so a model that predicts device gain from process parameters before a run has value out of proportion to its accuracy.
arXiv:2606. 00228v1 Announce Type: new Abstract: In semiconductor manufacturing, lithography projects circuit layouts onto silicon wafers through an optical mask.
arXiv:2606. 26713v1 Announce Type: new Abstract: As semiconductor technology nodes scale, computational lithography is essential for ensuring yield and performance.
arXiv:2606. 11247v1 Announce Type: cross Abstract: Generative models are increasingly used to propose designs, data, and control actions for physical systems, yet many such systems are governed by hard physical constraints rather than by perceptual plausibility.
PICasso is an AI‑enabled framework that converts natural‑language specifications into manufacturable silicon photonic integrated circuits (PICs) through a structured pipeline of NL → YAML → GDS, PDK‑aware knowledge injection, automated placement and routing, DRC/LVS validation, and SAX‑based photonic simulation. The authors introduce PIC‑Set, a benchmark of 36 parameterized PIC design tasks, and evaluate several large language models (LLMs) using new metrics such as structural and functional Spec@k, optimization efficiency, and robustness. Across the benchmark, PICasso markedly improves specification satisfaction, achieving up to 92.7% structural Spec@3 and 52% functional Spec@3, while reducing mean insertion loss from 4.98 dB to 3.25 dB through simulation‑guided optimization.
arXiv:2603. 15925v2 Announce Type: replace Abstract: Inverse design aims to find design parameters $x$ achieving target performance $y^*$.
The paper introduces a holistic framework that jointly optimizes architecture, token, and bit-width for Vision Transformers (ViTs). It uses Neural Architecture Search (AutoFormer) to find compact backbones, token merging (ToMe) to reduce information processing, and fp16 mixed‑precision inference to accelerate operations. Experiments on ImageNet‑1K and a real‑world 3D X‑ray semiconductor defect dataset show over 10× improvements in throughput and reductions in parameters, FLOPs, and energy while preserving accuracy.
arXiv:2606. 04850v1 Announce Type: cross Abstract: Designing a neural network processor is an end-to-end co-design problem: network architecture and training budget determine the inference workload; hardware mapping decisions determine chip area, latency, and energy; and these characteristics govern fabrication yield and manufacturing cost.
arXiv:2607. 23469v1 Announce Type: cross Abstract: Photonic-crystal surface-emitting lasers (PCSELs) can combine high-power operation with narrow-divergence surface emission, but optimizing coupled parameters requires costly full-wave simulations.
An inner hood panel must meet a deflection target, stay below a stress limit, and hit a mass target. Machine-learned surrogates have made the forward direction, geometry to performance, fast and routi...
arXiv:2609.08620v1 Announce Type: cross Abstract: We address the challenge of scalable uncertainty quantification in large-scale scientific applications, where complex state-of-the-art machine learni...
arXiv:2609.39738v1 Announce Type: new Abstract: Learning to generate machining process plans and toolpaths from B-rep CAD requires coupling discrete operation decisions with continuous tool motion as...
arXiv:2606. 11574v1 Announce Type: new Abstract: In many materials and product design problems, desirable candidates exhibit properties that fall within an acceptable range rather than achieve a single optimum.