Deep4ge: DNN Training Trajectories for Fault Detection and Diagnosis
arXiv:2607. 12868v1 Announce Type: cross Abstract: Deep learning systems often fail due to subtle implementation faults that alter training behavior.
TreeFI is a value‑aware statistical fault‑injection technique for FP32 single‑bit faults in deep neural network activations and weights. It partitions each layer’s value distribution into intervals with similar expected bit‑flip behavior using regression trees, then allocates injections across these intervals based on their relevance for failure‑rate estimation. This stratified approach preserves target confidence and error margins while dramatically reducing the required injection budget—up to 72.1× for activations and 11.2× for weights compared to existing baselines.
arXiv:2607. 12868v1 Announce Type: cross Abstract: Deep learning systems often fail due to subtle implementation faults that alter training behavior.
arXiv:2603. 22770v2 Announce Type: replace-cross Abstract: The deployment of deep neural networks (DNNs) in safety-critical edge environments necessitates robustness against hardware-induced bit-flip errors.
arXiv:2606. 26492v1 Announce Type: cross Abstract: Deep Learning (DL) programs can fail during training for many reasons, and diagnosing the cause is a costly and time-consuming maintenance task.
arXiv:2607. 11193v1 Announce Type: cross Abstract: To ensure the overall quality of AI-enabled software, not only traditional software components but also AI components need to be tested and repaired.
arXiv:2606. 04317v1 Announce Type: cross Abstract: Deep neural networks are increasingly deployed across heterogeneous and partially untrusted environments, where models are distributed through cloud storage, CI/CD pipelines, containerized services, and edge execution platforms.
The paper introduces REQAP, a reliability‑aware quantized weight packing technique for systolic‑array DNN accelerators. It uses a sensitivity‑driven mixed‑precision quantization to assign layer‑wise bit‑widths, a deterministic register‑level packing strategy for SIMD‑within‑a‑register execution, and selective bit‑level protection that replicates critical MSBs into unused register space. Experiments on AlexNet, VGG‑11, and ResNet‑18 show up to 62% memory reduction, 56% fewer MAC operations, and improved accuracy resilience under fault injection compared to baseline and fully protected models.
arXiv:2608. 04173v1 Announce Type: new Abstract: Deep neural networks (DNNs) deployed on resource-constrained neuromorphic hardware face three concurrent challenges: the need for model compression through pruning, vulnerability to adversarial input perturbations, and susceptibility to hardware-induced weight faults such as stuck-at-zero errors.
arXiv:2609.16742v1 Announce Type: cross Abstract: Convolutional Neural Networks (CNNs) are increasingly deployed in safety-critical edge applications, where soft errors can silently corrupt inference...
arXiv:2606. 07620v1 Announce Type: cross Abstract: With the growth of Vision Transformers in safety-critical domains like autonomous systems and medical imaging, ensuring their reliability against soft errors is paramount.
arXiv:2607. 15753v1 Announce Type: new Abstract: Deep Neural Networks (DNNs) used in safety-critical applications are vulnerable to hardware and memory faults that corrupt network weights and degrade reliability.
arXiv:2606. 24173v1 Announce Type: cross Abstract: On-device fault detection enables real-time diagnostics without cloud dependency, but deploying machine learning models on resource-constrained hardware demands careful tradeoffs between accuracy, latency, and model size.
The paper demonstrates that undervolting GPUs during CNN training introduces stochastic faults that act as implicit regularization, improving adversarial robustness while reducing power consumption. Experiments on LeNet, VGG-6, and MobileNetV3 trained on MNIST and CIFAR-10 show that undervolted models consistently outperform nominal-voltage models in both standard and adversarial training regimes. The approach offers a hardware-level defense that requires no algorithmic changes and yields significant energy savings due to the quadratic relationship between dynamic power and supply voltage.