Multi-Granular Node Pruning for Causal Circuit Discovery
arXiv:2512. 10903v2 Announce Type: replace Abstract: Circuit discovery aims to identify minimal subnetworks that are responsible for specific behaviors in large language models (LLMs).
arXiv:2610. 12520v1 Announce Type: cross Abstract: The goal of circuit discovery is to decompose a monolithic neural network into tiny modular subnetworks which are interpretable in the sense that each does an identifiable subtask.
arXiv:2512. 10903v2 Announce Type: replace Abstract: Circuit discovery aims to identify minimal subnetworks that are responsible for specific behaviors in large language models (LLMs).
arXiv:2603. 09161v2 Announce Type: replace-cross Abstract: Learning effective netlist representations is fundamentally constrained by the scarcity of labeled datasets, as real designs are protected by Intellectual Property (IP) and costly to annotate.
Certified Circuits introduces a framework that wraps any black‑box circuit discovery algorithm with randomized data subsampling to provide provable stability guarantees. By certifying that inclusion decisions over circuit components are invariant to bounded edit‑distance perturbations of the concept dataset, unstable components are abstained from, producing more compact and accurate mechanistic explanations. Across ResNet, ViT, and GPT‑2 on vision and language tasks, Certified Circuits achieves up to 56% higher accuracy and up to 80% fewer components, maintaining reliability where baseline methods degrade.
arXiv:2509. 21886v3 Announce Type: replace Abstract: Learning to compute, the ability to model the functional behavior of a circuit graph, is a fundamental challenge for graph representation learning.
arXiv:2605.09129v2 Announce Type: replace Abstract: Circuit study aims to explain how language models (LMs) implement a task by localizing and interpreting a circuit: a computational subgraph respons...
The article surveys recent progress in tractable probabilistic generative modeling, with a focus on Probabilistic Circuits (PCs). It offers a unified view of the trade‑offs between expressivity and tractability, outlining design principles, algorithmic extensions, and a taxonomy of the field. The review also covers deep and hybrid PCs that integrate ideas from deep neural models, and highlights challenges and open questions for future research.
arXiv:2504. 03711v2 Announce Type: replace-cross Abstract: Artificial intelligence (AI)-driven electronic design automation (EDA) techniques have been extensively explored for VLSI circuit design applications.
arXiv:2606. 16939v1 Announce Type: cross Abstract: A prominent research direction in mechanistic interpretability is learning sparse circuits over LLM components to reveal how they jointly produce model behavior.
arXiv:2607. 13047v1 Announce Type: new Abstract: Parameter decomposition (PD) decomposes neural networks into interpretable computational components that faithfully reflect the original network's operations.
arXiv:2607. 28954v1 Announce Type: new Abstract: Branch and Bound (BaB) aims to achieve complete verification of neural networks by adaptively partitioning the problem and applying off-the-shelf verifiers to subproblems.
arXiv:2511. 11346v2 Announce Type: replace Abstract: Multi-token prediction (MTP) is a prominent strategy to significantly speed up generation in large language models (LLMs), especially in byte-level LLMs, which are tokeniser-free but prohibitively slow.
arXiv:2609.36752v1 Announce Type: new Abstract: Circuit design is a complex and iterative process that requires expertise in electronic engineering. It involves selecting components while meeting per...