arXiv AI
Power-Performance Characterization of TinyML Systems
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Jun 16
An affordable hardware-aware neural architecture search for deploying convolutional neural networks on ultra-low-power computing platforms
arXiv:2606. 16290v1 Announce Type: cross Abstract: Hardware-aware neural architecture search (HW-NAS) allows the integration of Convolutional Neural Networks (CNNs) in microcontrollers devices by automatically designing neural architectures that can fit prearranged hardware constraints.
arXiv Computer Vision
1d ago
Hardware-Algorithm Co-Optimization of Early-Exit Neural Networks for Multi-Core Edge Accelerators
arXiv:2512.04705v3 Announce Type: replace-cross Abstract: The deployment of Early-Exiting Neural Networks (EENNs) on edge accelerators requires optimizing not only the network architecture but also i...
arXiv Machine Learning
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Low-Energy Reduced RISC-V Instruction Subset Processor for Tsetlin Machine Inference at the Edge
arXiv:2606. 19964v1 Announce Type: new Abstract: Tsetlin Machine (TM) is a logic-based machine learning approach that relies on simple bitwise operations and finite-state automata, which makes it attractive for edge AI deployments.
arXiv AI
Jun 16
Running hardware-aware neural architecture search on embedded devices under 512MB of RAM
arXiv:2606. 14824v1 Announce Type: cross Abstract: This document proposes a novel approach to hardware-aware neural architecture search (HW NAS) that considers the resources available on the computing platform running it, enabling its execution on various embedded devices.
arXiv AI
Sep 1
On the Instance Hardness as a Decision Criterion in TinyML Systems
The paper discusses TinyML, which deploys machine learning on devices with limited memory and computing resources. It introduces a preliminary study using the tree depth prune instance hardness method to control thresholds in TinyML systems. The results suggest that adjusting these thresholds can reduce energy consumption while maintaining classification quality.
arXiv AI
5d ago
ENAS: An Efficient Hardware-Aware Neural Architecture Search Framework for TinyML on Resource-Constrained Microcontrollers
ENAS is a hardware‑aware neural architecture search framework tailored for TinyML on microcontrollers. It uses a static feasibility check, a cell‑based search space with various block types and skip connections, and a three‑stage hybrid search strategy (random → top‑K → mutation) with cross‑run caching. The framework runs efficiently without GPUs, achieving significant search‑time speedups and competitive accuracy on Visual Wake Words and Melanoma Cancer benchmarks across a range of microcontrollers.