arXiv AI By Chengwei Zhou, Abu Masum, Xuming Chen, Mehran Moghadam, Sreetama Sarkar, Arnab Sanyal, Md Abdullah-Al Kaiser, M. Hassan Najafi, Sercan Aygun, Gourav Datta

Hardware-Aware Learned Representation Compression for Distributed In-Sensor Vision

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arXiv Computer Vision
Sep 14

Adaptive AI: Energy Efficient Multi-exit TinyML on Intelligent Vision Systems at the Edge

The paper presents a novel multi‑exit computational scheme for TinyML on an ultra‑low‑power GAP9 SoC, adding confidence‑based gating points to a MobileNetV2 CNN for ImageNet‑100. By allowing inference to stop early, the approach cuts average MAC operations by 41 % (from 313 MMAC to 185 MMAC), reduces inference time by 29 % (49 ms to 35 ms), and saves 24 % in energy (2.1 mJ to 1.6 mJ per frame) with only a ~1 % drop in accuracy. Compared to a state‑of‑the‑art adaptive CNN on the same hardware, the method more than doubles computational efficiency, raising MAC/cycle from 8.1 to 17.2.

By Luca Crupi, Lorenzo Lamberti, Alessandro Giusti, Daniele Palossi
arXiv Machine Learning
Oct 23

Spike-Aware Gradient-Based Mixed-Precision Quantization of Spiking Neural Networks for Vision Applications

The paper introduces a spike‑aware, gradient‑based mixed‑precision quantization framework for Spiking Neural Networks (SNNs), which assigns bit‑widths adaptively using first‑order gradient information. This approach avoids the memory and computational overhead of Hessian‑based methods like HAWQ‑V2 and is evaluated on VGG, ResNet, and Vision Transformer architectures across CIFAR‑10/100, ImageNet, and DVS‑CIFAR‑10 datasets. On ResNet‑34 with ImageNet, the method attains 73.30% accuracy at 4.78× compression, matching HAWQ‑V2 while reducing memory usage by 2.31× and bit‑allocation runtime by 100×, and it demonstrates energy‑efficient deployment without performance loss.

By Rajshekhar Rakshit, Devgokul B. V, Rakshitha Kalkura, Gopalakrishnan Srinivasan
arXiv Machine Learning
Sep 17

FAME: An FPGA-Based Platform for Approximate Multipliers Evaluation with Pattern-Guided DNN Retraining

FAME is an FPGA-based platform that evaluates approximate multipliers directly in hardware, eliminating slow CPU/GPU LUT emulation and reducing evaluation time for DNN inference. It also introduces a pattern-guided retraining method that uses multiplier-specific patterns to recover accuracy losses. Experiments on ResNet‑18 and MobileNetV2 over ImageNet show up to 3.47× faster multiplier evaluation and a 65.5% accuracy improvement over prior retraining approaches.

By Rappy Saha, Nima Amirafshar, Jude Haris, Nima Taherinejad, Jos\'e Cano