arXiv AI By Je Yang, Ivan Lobov, Thomas Karpati

Back to the Future: Rethinking EDA Infrastructure for Agentic Systems in Chip Design Verification

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The paper introduces Back-to-the-Future (BTTF), an agentic framework designed to automate post-simulation verification and waveform debugging in chip design. BTTF transforms large simulation dumps into a normalized SQLite database and uses a multi-agent orchestration engine to convert natural-language queries into schema-aware SQL, linking anomalies to versioned RTL code. In a benchmark of 150 queries, BTTF achieves 95.33% execution accuracy, demonstrating a viable path toward autonomous EDA verification.

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arXiv AI
Oct 9

A Survey on LLM-Integrated Hardware Design Verification

The paper surveys how large language models (LLMs) are being used in hardware verification, covering tasks such as assertion generation, testbench creation, bug localization, and formal reasoning. It categorizes the literature by methodology, verification goal, tool interaction, benchmarks, and evaluation metrics, and distinguishes between inference-time techniques (prompting, retrieval, structured reasoning, agentic workflows) and training-time adaptation. The authors highlight that LLMs excel as semantic reasoning, search, and orchestration components within verification workflows, yet emphasize the need for semantic alignment, scalable integration, generalization, and rigorous evaluation to ensure true verification correctness.

By Hao Zheng, Jaime Rafael Imperial, Bardia Nadimi, Xiangfei Kong