arXiv AI By Fabio Aurelio D'Asaro

An Unofficial FastLAS Tutorial: A Programmer's Guide

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arXiv:2607. 23557v1 Announce Type: cross Abstract: FastLAS is a scalable system for Inductive Logic Programming (ILP): you give it some background knowledge, a language bias, and a set of examples, and it searches for a set of logic program rules (a hypothesis) that explains the examples.

Machine-generated by The Flow from the publisher's headline and feed description — not written or checked by a human. The full article lives at arXiv AI.

arXiv Machine Learning
Jul 21

LogicIF: Towards Complex Logic Instruction Following

arXiv:2508. 09125v3 Announce Type: replace-cross Abstract: Instruction following has catalyzed the recent era of Large Language Models (LLMs) and is the foundational skill underpinning more advanced capabilities such as reasoning and agentic behaviors.

By Mian Zhang, Shujian Liu, Sixun Dong, Ming Yin, Yebowen Hu, Xun Wang, Simin Ma, Song Wang, Sathish Reddy Indurthi, Haoyun Deng, Zhiyu Zoey Chen, Kaiqiang Song
arXiv AI
Jul 22

FVRuleLearner: Operator-Level Reasoning Tree (Op-Tree)-Based Rules Learning for Formal Verification

arXiv:2604. 03245v2 Announce Type: replace-cross Abstract: The remarkable reasoning and code generation capabilities of large language models (LLMs) have recently motivated increasing interest in automating formal verification (FV), a process that ensures hardware correctness through mathematically precise assertions but remains highly labor-intensive, particularly through the translation of natural language into SystemVerilog Assertions (NL-to-SVA).

By Lily Jiaxin Wan, Chia-Tung Ho, Yunsheng Bai, Cunxi Yu, Ghaith Bany Hamad, Deming Chen, Haoxing Ren
Hugging Face Trending Papers
3d ago

Silinx: An Open, Browser-Based HDL Design Platform for Teaching Digital Systems on FPGA Boards

Silinx is a free, browser‑based HDL design platform that preserves the familiar Xilinx ISE Project Navigator workflow while eliminating the need to install legacy tools. It supports VHDL, Verilog, C/C++ via HLS, schematic and diagram inputs, and generates HDL automatically. Designs are simulated, built, and programmed onto real Spartan‑3E and Spartan‑6 boards over WebUSB, with an open flow that matches ISE’s bitstreams and even outperforms ISE in resource usage and timing for many designs.

arXiv AI
Jul 24

Explaining Weather Bulletins via ILP

arXiv:2607. 21184v1 Announce Type: new Abstract: Inductive Logic Programming (ILP) originated within the Logic Programming community in the Nineties as a framework for combining symbolic learning with declarative knowledge representation.

By Enrico Santi (University of Udine, DMIF), Alessandro Dal Pal\`u (University of Parma, SMFI), Agostino Dovier (University of Udine, DMIF), Talissa Dreossi (University of Udine, DMIF), Andrea Formisano (University of Udine, DMIF)