arXiv:2606. 13179v1 Announce Type: cross Abstract: In recent years, driven by the computational demands of data-intensive applications such as artificial intelligence and scientific computing, analog computing has gained renewed interest.
By Zhong Sun, Piergiulio Mannocci, Manuel Le Gallo, Abu Sebastian
The paper introduces a fully analog readout architecture for vector-matrix multiplication in spiking neural networks that uses voltage-to-time conversion instead of conventional current-mode circuits. By sensing the column voltage directly, the design eliminates the need for current summing and scaling circuitry, thereby reducing area and power consumption. Post-layout simulations of a 10×1 SNN in 130 nm CMOS and tests on a 64×10 digit‑classification network demonstrate the feasibility and efficiency of the proposed approach.
By Elia Mateu-Barriendos, \'Alvaro G\'omez-Pau, Josep Rius, Daniel Arum\'i, Rosa Rodr\'iguez-Monta\~n\'es, Salvador Manich
arXiv:2609.36584v1 Announce Type: new
Abstract: Analog in-memory computing (AIMC) offers an alternative for model training by executing matrix operations directly where weights are stored. However, s...
By Zhaoxian Wu, Tayfun Gokmen, Omobayode Fagbohungbe, T. Patrick Xiao, Tianyi Chen
arXiv:2607. 15123v1 Announce Type: cross Abstract: Recent FPGAs have improved deep learning (DL) inference efficiency through dedicated tensor blocks and in-BRAM computation.
By Jiajun Hu, Ruthwik Reddy Sunketa, Lei Zhao, Archit Gajjar, Luca Buonanno, Aman Arora
arXiv:2606. 02781v1 Announce Type: cross Abstract: Deep neural networks (DNNs) have achieved state-of-the-art performance across diverse domains.
By Sohan Salahuddin Mugdho, Md. Shahedul Hasan, Brahmdutta Dixit, Yang Lv, Jian-Ping Wang, Cheng Wang
arXiv:2605. 11855v2 Announce Type: replace-cross Abstract: Sequence learning is dominated by Transformers and parallelizable recurrent neural networks (RNNs) such as state-space models, yet learning long-term dependencies remains challenging, and state-of-the-art designs trade power consumption for performance.
By Julien Brandoit, Arthur Fyon, Damien Ernst, Guillaume Drion
arXiv:2603. 13042v2 Announce Type: replace Abstract: Digital Compute-in-Memory (DCiM) accelerates neural networks by reducing data movement.
By Yiqi Zhou, Yue Yuan, Yikai Wang, Bohao Liu, Qinxin Mei, Zhuohua Liu, Shan Shen, Wei Xing, Daying Sun, Li Li, Guozhu Liu
arXiv:2604. 26979v2 Announce Type: replace-cross Abstract: In-memory computing (IMC) is a paradigm that enables neural network inference by computing analog matrix-vector multiplications (MVM) directly in memory crossbar arrays, with the potential for energy efficiency gains over conventional von Neumann architectures.
By Anatole Moureaux, Anthony Lopes Temporao, Flavio Abreu Araujo
arXiv:2609.37525v1 Announce Type: new
Abstract: Physical neural networks and analog in-memory computing could reduce the energy cost of neural network training. Realizing this potential, however, req...
By Yuren Hao
arXiv:2505. 14303v3 Announce Type: replace-cross Abstract: Using Resistive Random Access Memory (RRAM) crossbars in Computing-in-Memory (CIM) architectures offers a promising solution to overcome the von Neumann bottleneck.
By Rebecca Pelke, Jos\'e Cubero-Cascante, Nils Bosbach, Niklas Degener, Florian Idrizi, Lennart M. Reimann, Jan Moritz Joseph, Rainer Leupers
Posted by Manish Gupta, Staff Software Engineer, Google Research AI-driven technologies are weaving themselves into the fabric of our daily routines, with the potential to enhance our access to knowledge and boost our overall productivity. The backbone of these applications lies in large language models (LLMs).
By Google AI