arXiv AI

Hardware-Matched Spiking Neural Networks for Real-Time Purkinje Cell Spike Classification

The paper introduces two compact spiking neural networks for real‑time classification of Purkinje cell spikes on untethered headstages. ConvSNN is mapped to the Matrix Vector Processor of an EFM32PG28 microcontroller, achieving a CS F1 of 0.873 with 1,018 parameters and reducing latency by 62.3% while extending battery life to 33.73 hours. StreamSNN processes one waveform value per timestep on a dedicated SKY130 circuit, reaching a CS F1 of 0.837 with 527 parameters, occupying 0.173 mm² and consuming 0.46 µJ per event with 0.2 ms computation within an 8.3 ms end‑to‑end latency.

arXiv AI
Jun 24

End-to-End Radar and Communication Modulation Recognition with Neuromorphic Computing

arXiv:2606. 24075v1 Announce Type: cross Abstract: Although deep learning-based methods can achieve high accuracy in automatic modulation recognition (AMR) tasks, their high computational cost makes it difficult to strike a balance between accuracy and power consumption, thereby limiting their application on resource-constrained platforms.

By Xiaohu Li, Chongxiao Qu, Caiyong Lin, Chenxiao Dou, Wei Hua
arXiv AI
Aug 11

SuperNeuroMAT: An Efficient Matrix-based Simulator for Spiking Neural Networks

arXiv:2608. 08479v1 Announce Type: cross Abstract: Spiking neural networks (SNNs) offer a promising pathway to energy-efficient AI and brain-inspired computing.

By Prasanna Date, Kevin Zhu, Shruti Kulkarni, Ashish Gautam, Chathika Gunaratne, Robert Patton, Tyler Nitzsche, Ian Mulet, Zachary Johnson-Scott, Addison Helms, Duncan Rowden, Simon Weston, Maryam Parsa, Catherine Schuman, Thomas Potok
arXiv Machine Learning
Oct 28

Evaluating Spiking MoveNet Deployability for Near-Future Onboard Spiking Satellite Pose Estimation

The paper evaluates a spiking version of the MoveNet architecture, called S-MoveNet-Lightning, for autonomous spacecraft pose estimation. Using the RAPTOR dataset, it compares the spiking model to the standard MoveNet-Lightning, finding that the spiking version requires on average 2.2 times fewer multiplication and accumulation operations on FPGA platforms with AMD Deep Learning Processor Units. The study highlights balanced advantages in computational resources and architectural settings for spiking U‑Net‑like architectures in embedded, event‑driven space applications.

By Jonathan Courtois, Christophe Marabotto, Benoit Miramond, Alain Pegatoquet