arXiv AI
Syn2Logic: End-to-End Neuromorphic Design Automation
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arXiv Machine Learning
Jun 5
Surrogate Neural Architecture Codesign Package (SNAC-Pack)
arXiv:2605. 16138v2 Announce Type: replace Abstract: Neural architecture search (NAS) is a powerful approach for automating model design, but existing methods often optimize for accuracy alone or rely on proxy metrics such as bit operations (BOPs) that correlate poorly with hardware cost.
arXiv Machine Learning
Jul 31
SNAC-Pack 2.0: Scaled-Out Surrogate Neural Architecture Codesign
arXiv:2605. 16138v3 Announce Type: replace Abstract: Neural architecture search (NAS) is a powerful approach for automating model design, but existing methods often optimize for accuracy alone or rely on proxy metrics such as bit operations (BOPs) that correlate poorly with hardware cost.
arXiv AI
Oct 23
VHDLBench: Benchmarking and Fine-Tuning Large Language Models for VHDL-Based Chip Design
The paper introduces VHDLBench, a benchmark and fine‑tuning framework for large language models (LLMs) applied to VHDL-based chip design. It presents a dataset of over 18,500 syntax‑verified VHDL examples, fine‑tunes five 7B‑parameter LLMs with QLoRA, and evaluates them through a three‑level pipeline—syntax/synthesis validation, functional simulation, and FPGA prototyping on Zynq SoCs. Results show up to 92% syntax correctness and 73% functional accuracy, with DeepSeek‑Coder achieving the best performance and successful deployment on real hardware.
arXiv AI
Jun 10
Towards Autonomous Accelerator Design: FPGA Accelerator Generation with SECDA
arXiv:2606. 11117v1 Announce Type: cross Abstract: Designing FPGA-based accelerators for modern artificial intelligence workloads requires exploring a large and complex hardware design space that involves architectural parameters, data flow strategies, and memory hierarchies, making the process very time consuming.
Hugging Face Trending Papers
Aug 7
HLSmith: An Expert-Guided Agentic Framework for C/C++-to-HLS Translation
Application-specific FPGA accelerators offer substantial performance and energy-efficiency gains across many application domains, but developing them is costly, often requiring months of specialized effort. Even with high-level synthesis (HLS), designers still need extensive hardware expertise to build high-performance accelerators.
arXiv Machine Learning
Oct 3
SyntheticHLS: Building Diverse Synthetic High-Level Synthesis Datasets using LLMs
SyntheticHLS is a framework that uses large language models to create large-scale, diverse synthetic high‑level synthesis (HLS) datasets. It employs an iterative, feedback‑guided mutation loop that transforms seed designs into more complex, scalable ones, guided by quantitative metrics of design complexity and scalability. The resulting datasets outperform manually curated or zero‑shot generated ones in training deep learning models for HLS quality‑of‑results, offering broader coverage of design space and better generalization.