arXiv AI July 17, 2026 By A. C. Opus, J. Q. Lu

A Modern Multimodal Assistant on a 6 GB 2011 GPU: Stage-Validated, All-GPU CUDA Inference for Fermi

arXiv:2607. 14568v1 Announce Type: cross Abstract: A companion study ran a 35B mixture-of-experts model on a 2011 NVIDIA Tesla C2075 (Fermi, sm_20, 6GB) as a GPU-prefill/CPU-decode hybrid, because the 4-bit model did not fit in device memory (arXiv:2606.

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arXiv Machine Learning

Sep 23

Accelerating the Mitigation of LLM Inference Nondeterminism Across GPU Architectures

The paper addresses the problem of non‑deterministic outputs from large language models (LLMs) when run on different GPU architectures, caused by floating‑point non‑associativity and hardware‑dependent kernel choices. It proposes a set of fixed‑configuration fused‑upcast GEMM kernels that load 16‑bit weights, upcast to FP32, and perform IEEE‑754 compliant reductions in a problem‑shape‑dependent order, ensuring identical linear‑layer outputs across NVIDIA Ampere, Ada, and Hopper GPUs. The new approach achieves 1.17–3.1× faster end‑to‑end performance than existing solutions and halves weight‑memory traffic while maintaining cross‑architecture reproducibility.

By Liam Cooper, Shinnung Jeong, Hyeran Jeon, Jeffrey Young, Hyesoon Kim

llms benchmarks

arXiv AI

Sep 21

How Much of a Real Workload Can LLM-Generated GPU Kernels Actually Reach?

arXiv:2609.21058v1 Announce Type: cross Abstract: Language models can now write GPU kernels that outperform PyTorch. We evaluate five model configurations on KernelBench level 1 and find that a front...

By Gaurav Agarwal, Ashish Garg, Isha Singhal

llms rag

arXiv Machine Learning

Jun 5

Evaluating CUDA Tile for AI Workloads on Hopper and Blackwell GPUs

arXiv:2604. 23466v2 Announce Type: replace Abstract: NVIDIA's CUDA Tile (CuTile) introduces a Python-based, tile-centric abstraction for GPU kernel development that aims to simplify programming while retaining Tensor Core and Tensor Memory Accelerator (TMA) efficiency on modern GPUs.

By Divakar Kumar Yadav, Tian Zhao, Deepak Kumar

llms efficiency benchmarks

arXiv AI

Jun 8

FP8 is All You Need (Part 1): Debunking Hardware FP64 as the HPC Holy Grail

arXiv:2606. 06510v1 Announce Type: cross Abstract: Conventional HPC dogma holds that native hardware FP64 silicon is the irreducible foundation of scientific computing -- the "holy grail" of double-precision simulation.

By Satoshi Matsuoka

efficiency

arXiv Machine Learning

Sep 15

Physically Partitioned KVCache Format for CPU--GPU Load Balancing in MoE Inference

arXiv:2609.14507v1 Announce Type: cross Abstract: Single-GPU long-context inference with Mixture-of-Experts (MoE) models requires spilling the key-value cache (KVCache) to CPU memory. The spilled KV...

By Enda Yu, Dezun Dong, Xiangke Liao

arXiv AI

Jun 9

vla.cpp: A Unified Inference Runtime for Vision-Language-Action Models

arXiv:2606. 08094v1 Announce Type: cross Abstract: Vision-Language-Action (VLA) policies are typically shipped as Python/PyTorch stacks that assume a workstation-class GPU, a mismatch for the hardware on which robots actually run.

By Khanh D. Nguyen, Hung T. Ho, Chinh T. Nguyen, Thanh Q. Duong, Linh D. Le, Duy M. H. Nguyen, Vien A. Ngo, An T. Le

llms diffusion robotics multimodal benchmarks

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Related stories

Accelerating the Mitigation of LLM Inference Nondeterminism Across GPU Architectures

How Much of a Real Workload Can LLM-Generated GPU Kernels Actually Reach?

Evaluating CUDA Tile for AI Workloads on Hopper and Blackwell GPUs

FP8 is All You Need (Part 1): Debunking Hardware FP64 as the HPC Holy Grail

Physically Partitioned KVCache Format for CPU--GPU Load Balancing in MoE Inference

vla.cpp: A Unified Inference Runtime for Vision-Language-Action Models