The paper introduces the simultaneous neural topology optimization (SNTO) framework, which uses custom neural networks to jointly represent state, adjoint, and design variables in a single optimization loop. SNTO incorporates a multi-component loss function that balances design objectives, aggregated stress constraints, and potential energy, and employs a hardware‑aware training scheme that partitions the design domain across multiple GPUs to handle millions of degrees of freedom. Validation on 2D benchmarks shows super‑resolution designs with sharper boundaries and lower volume fractions, while large‑scale 3D tests demonstrate scalability to eight million collocation points on eight GPUs.
By Xiangyu Sun, Shirin Hosseinmardi, Ramin Bostanabad
The paper introduces SNTO, a simultaneous neural topology optimization framework that represents state, adjoint, and design variables with custom neural networks optimized in a single loop. It employs a hardware‑aware training scheme that partitions the design domain across multiple GPUs and slices subdomains to manage memory, enabling stress‑constrained topology optimization at millions of degrees of freedom. Experiments on 2D benchmarks show sharper boundaries and reduced gray areas compared to finite element methods, while 3D problems with up to eight million points are solved efficiently on eight GPUs.
By Xiangyu Sun, Shirin Hosseinmardi, Ramin Bostanabad
KATOsuper is an objective‑agnostic framework that accelerates neural topology optimization by coupling neural‑reparameterized TO with a Sensitivity‑Consistent Fourier Neural Operator (SC‑FNO). It uses a forward_split architecture to ensure that sensitivities derived via automatic differentiation remain consistent with predicted objectives, enabling stable optimization. The method demonstrates significant deployment‑time speedups (15–110×) over MATLAB baselines while preserving optimality across 2D and 3D benchmark problems, including compliance and stress minimization, and supports zero‑shot extrapolation to higher resolutions.
By Shengyu Yan, Jasmin Jelovica
arXiv:2602. 19330v2 Announce Type: replace Abstract: Graph Neural Networks (GNNs) are increasingly explored for physical design analysis in Electronic Design Automation, particularly for modeling Clock Tree Synthesis behavior such as clock skew and buffering complexity.
By Barsat Khadka, Kawsher Roxy, Md Rubel Ahmed
Batch Before You Lift: Scalable Topological Deep Learning on Large Graphs introduces Cluster‑TNN, a framework that lifts graph data locally instead of globally, enabling efficient mini‑batch construction for higher‑order domains such as hypergraphs and simplicial complexes. By partitioning the input graph and dynamically sampling node clusters at runtime, Cluster‑TNN reduces peak GPU memory usage by an average of 83.2% across 21 comparisons while preserving connectivity needed for topological structures. This approach allows the first training of multiple higher‑order Topological Neural Networks on large datasets like Reddit and OGBN Products, demonstrating a general strategy for scaling Topological Deep Learning beyond global domain construction.
arXiv:2606. 19921v1 Announce Type: new Abstract: This work proposes an element-based Convolutional Neural Network (CNN) to accelerate density-based Topology Optimization (TO), termed eCNNTO.
By Shengbiao Lu, Xiaodong Wei
Batch Before You Lift: Scalable Topological Deep Learning on Large Graphs introduces Cluster‑TNN, a framework that lifts graph data locally instead of constructing a full lifted representation. By partitioning the input graph, sampling node clusters, and reconstructing induced subgraphs at runtime, Cluster‑TNN creates topological mini‑batches that preserve necessary connectivity for higher‑order structures. Across 21 matched comparisons, it reduces peak GPU memory by an average of 83.2% while maintaining competitive predictive performance, enabling the first training of multiple higher‑order Topological Neural Networks on large datasets such as Reddit and OGBN Products.
By David Leko, Luka Beni\'c, Guillermo Bern\'ardez, Nina Miolane, Olga Fink, Lev Telyatnikov
The paper presents a modified physics-informed DeepONet (PI-DeepONet) architecture that reduces computational cost by eliminating redundancy in the Branch network’s handling of input functions across collocation points. The new formulation is mathematically equivalent to the original but uses smaller input tensors and fewer network evaluations, leading to faster training while maintaining comparable predictive accuracy on 1D, 2D, and 3D linear advection problems. Experiments show up to a 3.75× speed‑up in 2D and enable feasible training of 3D models on an NVIDIA A100 GPU, where the original architecture fails due to memory limits.
By Nahum Banks, Gustavo A. M. de Almeida, Sergio Maldonado
arXiv:2609.14841v1 Announce Type: new
Abstract: Scientific machine learning methods such as physics-informed neural networks (PINNs) increasingly rely on domain decomposition for better scalability w...
By Sidharth S. Menon, Irina Tezaur, Ameya D. Jagtap
arXiv:2602. 04940v2 Announce Type: replace Abstract: Deep learning has emerged as a transformative tool for the neural surrogate modeling of partial differential equations (PDEs), known as neural PDE solvers.
By Hang Zhou, Haixu Wu, Haonan Shangguan, Yuezhou Ma, Huikun Weng, Jianmin Wang, Mingsheng Long
arXiv:2607. 08025v1 Announce Type: new Abstract: While neural PDE solvers have demonstrated significant potential for accelerating engineering simulations, existing architectures remain constrained by high memory consumption and the single node bottleneck, where the maximum processable mesh resolution is strictly limited by the VRAM of a single compute unit.
By Weiheng Zhong, Jing Bi, Victor Oancea, Hadi Meidani
While neural PDE solvers have demonstrated significant potential for accelerating engineering simulations, existing architectures remain constrained by high memory consumption and the single node bottleneck, where the maximum processable mesh resolution is strictly limited by the VRAM of a single compute unit. To address these challenges, we propose PGD-NO, a neural operator with Precomputed Geometry Decomposition, that relocates the computational overhead of geometric encoding to a deterministic pre-computation phase.