arXiv Machine Learning

An RRAM-based Hardware Implementation of a Radial Basis Function Neuron for Edge Classifiers

arXiv:2606. 14739v1 Announce Type: cross Abstract: The deployment of modern machine learning (ML) solutions on resource-constrained edge devices highlights implementation challenges.

arXiv Machine Learning
Jul 23

Self-organizing Architecture of Receptron Units: a Hardware-Aware Framework for Edge Intelligence

arXiv:2607. 20162v1 Announce Type: new Abstract: The growing demand for intelligent processing at the edge of IoT networks is constrained by the severe computational and memory limitations of microcontroller units, which render impractical conventional deep learning approaches.

By Stefano Radice, Ludovico Casaccia, Riccaro Emanuele Beccalli, Bruno Paroli, Paolo Milani
arXiv Machine Learning
Jul 23

Leveraging ECRAM for Edge Continual Learning

arXiv:2607. 19661v1 Announce Type: cross Abstract: Several edge computing platforms, such as autonomous vehicles and smart sensing devices, need to adapt to dynamic environments in real time by learning from new data in the field.

By Nabila Tasnim, Haoran Liu, Qing Cao, Saugata Ghose
arXiv Machine Learning
Jun 30

Physical Analogue Kolmogorov-Arnold Networks based on Reconfigurable Nonlinear-Processing Units

arXiv:2602. 07518v3 Announce Type: replace-cross Abstract: Kolmogorov-Arnold Networks (KANs) shift neural computation from linear layers to learnable nonlinear edge functions, but implementing these nonlinearities efficiently in hardware remains an open challenge.

By Manuel Escudero, Mohamadreza Zolfagharinejad, Sjoerd van den Belt, Nikolaos Alachiotis, Wilfred G. van der Wiel
arXiv Machine Learning
Aug 10

MAUPITI: On-Device Prototype-Based Learning on a Smart Infrared Sensor

arXiv:2608. 07192v1 Announce Type: new Abstract: Low-resolution infrared (IR) array sensors represent an interesting solution for privacy-preserving human sensing in embedded systems.

By Beatrice Alessandra Motetti, Tanguy Dugas du Villard, Matteo Risso, Alessio Burrello, Francesco Daghero, Enrico Macii, Massimo Poncino, Marco Castellano, Alfio Basile, Daniele Jahier Pagliari
arXiv Machine Learning
Jul 16

Optimizing Binary and Ternary Neural Network Inference on RRAM Crossbars using CIM-Explorer

arXiv:2505. 14303v3 Announce Type: replace-cross Abstract: Using Resistive Random Access Memory (RRAM) crossbars in Computing-in-Memory (CIM) architectures offers a promising solution to overcome the von Neumann bottleneck.

By Rebecca Pelke, Jos\'e Cubero-Cascante, Nils Bosbach, Niklas Degener, Florian Idrizi, Lennart M. Reimann, Jan Moritz Joseph, Rainer Leupers
arXiv Machine Learning
Aug 26

Low-Latency Activation-Regularized Sparse Neural Operators with Distillation Assistance Towards Real-Time Edge-Deployable Virtual Sensing

The paper introduces the Sparse-Activation-ReLU (SAR) layer, a single‑step neural operator that promotes activation sparsity without surrogate‑gradient training and is compatible with event‑based computing. In a trunk‑based NOMAD architecture, SAR improves the combined Latency‑Error‑Energy (LEE) metric by over fivefold compared to Variable Spiking Neuron (VSN) and Leaky Integrate‑and‑Fire (LIF) models. Additional techniques such as synthetic knowledge distillation, a ReLU‑based spiking loss, and graph‑neighbor thresholding further reduce LEE and L2 error on the Heat Exchanger dataset, advancing energy‑efficient virtual sensing for edge deployment.

By William Howes, Farid Ahmed, Syed Bahauddin Alam