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arXiv AI By Matthew DeLorenzo, Kevin Tieu, Prithwish Jana, Piyush Jha, Dileep Kalathil, Vijay Ganesh, Jeyavijayan Rajendran

Search-Guided Reasoning Trace Curation for Verilog Generation

Read the original on arXiv AI →

The paper introduces MCTS‑SFT, a verifier‑guided framework that uses Monte Carlo Tree Search to curate structured reasoning traces for fine‑tuning Verilog generation models. Within this framework, Plan‑MCTS searches over compact hardware‑design plans that explicitly encode interfaces, timing, state, behavior, and update rules, and retains these plans during supervised fine‑tuning. Experiments show that Plan‑MCTS yields the highest functional trace accuracy (84.2%) and improves downstream model performance, raising pass@10 from 52.56% to 57.7% and outperforming chain‑of‑thought distillation by up to 3.7 points while halving generation length.

Machine-generated by The Flow from the publisher's headline and feed description — not written or checked by a human. The full article lives at arXiv AI.

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