arXiv:2606. 04847v1 Announce Type: cross Abstract: Native GPU kernel generation turns high-level tensor programs into executable, efficient low-level code.
By Kun Cheng, Songshuo Lu, Sicong Liao, Tankun Li, Yafei Zhang, Dong Yang, Qiheng Lv, Hua Wang, Zhi Chen, Yaohua Tang
arXiv:2607. 20908v1 Announce Type: cross Abstract: Reinforcement Learning with Verifiable Rewards (RLVR) has emerged as a powerful technique to enhance the reasoning capacity of LLMs for optimized code generation.
By Quazi Ishtiaque Mahmud, Nesreen K. Ahmed, Ali Jannesari
Reinforcement Learning with Verifiable Rewards (RLVR) has emerged as a powerful technique to enhance the reasoning capacity of LLMs for optimized code generation. However, existing RLVR approaches primarily rely on outcome-based signals such as correctness and speedup, overlooking performance-critical structural properties of programs that are essential for generating optimized code.
arXiv:2607. 02390v1 Announce Type: new Abstract: How can Large Language Models (LLMs) solve problems they currently cannot?
By Juliette Decugis, Fabian Gloeckle, Francis Bach, Taco Cohen, Gabriel Synnaeve
arXiv:2607. 04395v1 Announce Type: new Abstract: Recent agentic approaches to LLM-based kernel generation have achieved impressive results on CUDA.
By Junjie Tang, Jun Huan, Hao Zhou, Yuhao Zhang, Lin Wang
arXiv:2606. 04246v1 Announce Type: new Abstract: Automatic generation of RTL code for digital hardware designs remains challenging due to long-horizon reasoning, multi-step dependencies, and strict correctness constraints in Verilog and VHDL.
By Prashanth Vijayaraghavan, Apoorva Nitsure, Luyao Shi, Ehsan Degan, Vandana Mukherjee