CUDA‑Harness is a framework that enables the generation and optimization of CUDA kernels directly from natural language. It introduces Intermediate‑Structured Generation to bridge high‑level semantics with low‑level kernel code, uses Synthesis‑Based Verification to mitigate reward hacking by providing isolated test data, and employs Feedback‑Adaptive Evolution to prioritize correctness while improving performance. Experiments show the approach generalizes across different large language models, hardware platforms, and even supports C‑to‑CUDA transpilation.
By Qi Fan, An Zou, Yehan Ma
Reinforcement Learning with Verifiable Rewards (RLVR) has emerged as a powerful technique to enhance the reasoning capacity of LLMs for optimized code generation. However, existing RLVR approaches primarily rely on outcome-based signals such as correctness and speedup, overlooking performance-critical structural properties of programs that are essential for generating optimized code.
arXiv:2607. 20908v1 Announce Type: cross Abstract: Reinforcement Learning with Verifiable Rewards (RLVR) has emerged as a powerful technique to enhance the reasoning capacity of LLMs for optimized code generation.
By Quazi Ishtiaque Mahmud, Nesreen K. Ahmed, Ali Jannesari
arXiv:2606. 04847v1 Announce Type: cross Abstract: Native GPU kernel generation turns high-level tensor programs into executable, efficient low-level code.
By Kun Cheng, Songshuo Lu, Sicong Liao, Tankun Li, Yafei Zhang, Dong Yang, Qiheng Lv, Hua Wang, Zhi Chen, Yaohua Tang
arXiv:2607. 24762v1 Announce Type: new Abstract: Machine learning models are increasingly embedded in everyday software, and most of their runtime is spent in a small set of compute kernels such as matrix multiplication, convolution, and normalization.
By Joshua Brodsky, Dhravid Kumar, Savini Kashmira, Jayanaka Danatanarayana, Jason Mars, Krisztian Flautner, Lingjia Tang
arXiv:2602. 11715v2 Announce Type: replace Abstract: Diffusion large language models (dLLMs) have emerged as a compelling alternative to autoregressive (AR) LLMs, owing to their capacity for parallel token generation.
By Haolei Bai, Lingcheng Kong, Xueyi Chen, Jianmian Wang, Zhiqiang Tao, Huan Wang