The paper introduces RAMP, a method for robust adaptive mixed‑precision quantization of vision models on edge CPUs. It evaluates 13 sensitivity metrics across four neural networks, finding that Jensen‑Shannon Divergence consistently identifies layers that can be safely quantized. Using K‑Means clustering on these metrics, RAMP achieves near‑lossless accuracy with an average 1.81× speed‑up, while cautioning against excluding low‑speed‑up layers that can fragment the computational graph.
By David Poblaci\'on-Criado, Dario Garcia-Gasulla, Eduardo Quinones
Deploying deep learning models on edge CPUs is bottlenecked by computational and memory constraints. Mixed-precision quantization promises to reduce inference latency while preserving accuracy. Howeve...
arXiv:2608. 06916v1 Announce Type: new Abstract: Quantized Neural Networks~(QNN) with low-bitwidth data have proven promising in efficient storage and computation on edge devices.
By Zijun Jiang, Yangdi Lyu
The paper introduces W16A16, a 16‑bit precision quantization method for convolutional neural networks aimed at microcontroller units. On the Armv7E‑M architecture, W16A16 delivers faster inference speeds and lower energy consumption than existing quantization schemes while reducing quantization errors by roughly tenfold compared to 8‑bit approaches. The authors analyze the MCU architecture, explain why 16‑bit operations yield performance gains, and evaluate empirical errors and resource usage across regression and classification tasks.
By Rui Liu, Benjamin Paa{\ss}en
arXiv:2606. 27884v1 Announce Type: cross Abstract: Mixed-precision computation has been introduced in deep neural networks (DNNs) as an effective approach to reduce latency, energy consumption, and memory footprint.
By Leandro Fiorin, Marco Ronzani, Cristina Silvano
Modern deep neural networks achieve strong performance, but their scale makes them costly and slow, especially on resource-constrained edge devices. Pruning and quantization address this, but rely on manual, expert choices and on algorithms that are hard to apply across architectures.