arXiv:2607. 04224v1 Announce Type: cross Abstract: AI-RAN aims to unify artificial intelligence and radio access network workloads on a shared compute substrate.
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The paper introduces Radio‑Frequency Convolutional Neural Networks (RF‑CNNs), which repurpose the frequency mixer in wireless radios to perform convolutional neural network inference directly on edge devices. By mapping multi‑channel convolutions onto frequency tones, the passive mixer can execute the entire operation in a single pass, enabling deep CNNs with up to 26.4 million parameters and nine layers to run on smartphones, wearables, and drones. Experimental results show near full‑precision performance while reducing energy consumption to 0.72 fJ per multiply‑accumulate—two orders of magnitude lower than adding a digital processor. "whyItMatters":"The approach leverages existing radio hardware to deliver efficient, state‑of‑the‑art AI inference on billions of devices without increasing size, weight, power, or cost."
arXiv:2608.28652v1 Announce Type: new Abstract: Artificial intelligence (AI) models have demonstrated remarkable capabilities across various domains, yet their widespread deployment is impeded by sig...
arXiv:2512.04705v3 Announce Type: replace-cross Abstract: The deployment of Early-Exiting Neural Networks (EENNs) on edge accelerators requires optimizing not only the network architecture but also i...
arXiv:2606. 29518v1 Announce Type: cross Abstract: With the widespread adoption of AI in various IoT scenarios such as smart sensing and processing, AI chips have become a common component at the edge.
arXiv:2609.36070v1 Announce Type: cross Abstract: AI accelerator systems are rapidly consolidating into scale-up architectures, where tens to thousands of GPUs communicate over high-bandwidth, single...
The paper addresses the problem of non‑deterministic outputs from large language models (LLMs) when run on different GPU architectures, caused by floating‑point non‑associativity and hardware‑dependent kernel choices. It proposes a set of fixed‑configuration fused‑upcast GEMM kernels that load 16‑bit weights, upcast to FP32, and perform IEEE‑754 compliant reductions in a problem‑shape‑dependent order, ensuring identical linear‑layer outputs across NVIDIA Ampere, Ada, and Hopper GPUs. The new approach achieves 1.17–3.1× faster end‑to‑end performance than existing solutions and halves weight‑memory traffic while maintaining cross‑architecture reproducibility.