AMDKernelVault is an open HIP and Triton kernel corpus and training framework designed for AMD CDNA GPUs. It includes 62,153 verified HIP kernels, 39,893 Triton kernels, and 2,377 ROCm library QA entries, and introduces agent-driven pipelines (HIPKernelGen and TritonKernelGen) that convert PyTorch references into GPU kernels, compile, validate, and profile them on AMD hardware. The corpus was used to fine‑tune Qwen3-8B, achieving the highest correctness on several benchmarks such as PyTorch-to-HIP, TritonBench‑G, and ROCmBench under fixed evaluation budgets.
arXiv:2607. 24762v1 Announce Type: new Abstract: Machine learning models are increasingly embedded in everyday software, and most of their runtime is spent in a small set of compute kernels such as matrix multiplication, convolution, and normalization.
arXiv:2607. 16241v1 Announce Type: cross Abstract: Recent large language models (LLMs) can generate custom CUDA kernels that appear to outperform PyTorch on benchmarks such as KernelBench.
arXiv:2606. 26453v1 Announce Type: new Abstract: We present KernelPro, a closed-loop multi-agent system that automatically generates, profiles, and iteratively optimizes GPU kernel code by integrating large language model (LLM) code generation with hardware profiler feedback and pluggable bottleneck detection tools.
arXiv:2607. 14541v1 Announce Type: new Abstract: Existing GPU kernel generation benchmarks draw problems from synthetic or curated sources that diverge from deployed workloads.
KernelGenBench is a unified benchmark that evaluates large language models and agentic systems for generating efficient Triton kernels across diverse operator sources and hardware platforms. It covers 210 operators from PyTorch ATen, vLLM, and cuBLAS, and tests a 110‑operator subset on six different chips, consuming over 15 billion tokens in evaluation. The study finds that no single method dominates across all sources and platforms, with significant variations in correctness and performance depending on the operator source and hardware, and that agentic approaches require millions of tokens per successful operator.
AsmEvo is an agentic assembly-level optimizer that targets compiled AMDGPU code objects, reconstructing a reassemblable representation and applying low-level edits guided by a long-horizon agent. It rebuilds ABI-preserving optimized objects and verifies functional equivalence through differential testing against the original binary. Experiments show significant speedups—up to 1.35× geometric mean on MI308X and 1.18× on MI300X—while maintaining correctness.
arXiv:2607. 27231v1 Announce Type: cross Abstract: Large language models (LLMs) have significantly increased the demand for efficient accelerator kernels, but kernel development remains a highly specialized and labor-intensive task.
arXiv:2606. 02963v1 Announce Type: new Abstract: Production inference increasingly targets a heterogeneous mix of accelerators.
arXiv:2607. 04395v1 Announce Type: new Abstract: Recent agentic approaches to LLM-based kernel generation have achieved impressive results on CUDA.
PTXBench is a benchmark designed to evaluate and adapt large language models (LLMs) for GPU kernel optimization using architecture‑specific PTX code. It assesses functional correctness, runtime execution of target instructions, and speedup over state‑of‑the‑art libraries on GEMM and attention workloads on H100 and B200 GPUs. The study finds uneven success rates, especially on complex attention backward tasks, and shows that executing target instructions does not guarantee competitive performance, with no model consistently outperforming frontier libraries. The authors also fine‑tune Qwen3.6‑27B, noting that repair‑conditioned training improves some tasks but generalization remains inconsistent, highlighting the importance of data coverage, balance, and teacher quality.
Reinforcement Learning with Verifiable Rewards (RLVR) has emerged as a powerful technique to enhance the reasoning capacity of LLMs for optimized code generation. However, existing RLVR approaches primarily rely on outcome-based signals such as correctness and speedup, overlooking performance-critical structural properties of programs that are essential for generating optimized code.
PTXBench is a benchmark designed to evaluate and adapt large language models (LLMs) for GPU kernel optimization using architecture-specific PTX code. It assesses functional correctness, runtime execution of target instructions, and speedup over leading libraries on GEMM and attention workloads on H100 and B200 GPUs. The study finds uneven performance across models, especially on complex attention backward tasks, and shows that fine‑tuning Qwen3.6‑27B improves some tasks but generalization remains inconsistent.