arXiv Machine Learning By Ho Fung Tsoi, Dylan Rankin, Vladimir Loncar, Philip Harris

SparsePixels: Efficient Convolution for Sparse Data on FPGAs

Read the original on arXiv Machine Learning →

arXiv:2512. 06208v3 Announce Type: replace-cross Abstract: Inference of standard convolutional neural networks (CNNs) on FPGAs often incurs high latency and a long initiation interval due to the deep nested loops required to densely convolve every input pixel regardless of its feature value.

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